<azonenberg> qu1j0t3: in fact, my Verilog tends to be very OO-structured too lol
<azonenberg> there's no inheritance, but otherwise...
<azonenberg> modules have private internal data
<azonenberg> they can contain instances of other modules
<azonenberg> you can have "methods" with a "do this" input plus parameters going in and out
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<awygle> nobody cares about code reuse :-(
<awygle> Probably because everything in the environment is so terrible
<qu1j0t3> awygle: some people do but it's off topic for this channel
<awygle> lol all right
<qu1j0t3> no
<qu1j0t3> that wasn't a rebuke
<qu1j0t3> sorry it sounded like one :)
* qu1j0t3 notes it has been that kind of day
<azonenberg> So i just found out the guy at the home depot who was handling my sheetrock order doesn't work there anymore
<awygle> no offense taken :-)
<azonenberg> Unsure if fired or quit
<awygle> sted in code reuse, if there's a different channel I should be in
<azonenberg> but that might explain some of my difficulties :p
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<awygle> ... okay irc. "well I'm interested in" is how that was supposed to start.
* awygle is on vacation and is having a great day
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<qu1j0t3> awygle: i'm glad of that
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<rqou> yet another casualty of "what is a candela?" https://twitter.com/FioraAeterna/status/1019053805436977152?s=19 (cc whitequark)
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<openfpga-github> [logtools] azonenberg pushed 1 new commit to master: https://git.io/fNsgu
<openfpga-github> logtools/master 4df744a Andrew Zonenberg: Fixed signed/unsigned mismatch
<openfpga-bot> [jtaghal] azonenberg pushed 2 new commits to master: https://git.io/fNsgK
<openfpga-bot> jtaghal/master 9540092 Andrew Zonenberg: XilinxUltrascaleDevice: Fixed signed/unsigned mismatch
<openfpga-bot> jtaghal/master e788eb2 Andrew Zonenberg: ARMAPBDevice: Added WriteRegisterBy* functions
<openfpga-bot> [jtaghal] azonenberg pushed 3 new commits to master: https://git.io/fNsgF
<openfpga-bot> jtaghal/master 79ed7cb Andrew Zonenberg: PipeJtagInterface: Fixed string parsing type mismatch
<openfpga-bot> jtaghal/master 7786019 Andrew Zonenberg: DigilentJtagInterface: Fixed signed/unsigned mismatch
<openfpga-bot> jtaghal/master c72df3e Andrew Zonenberg: LockableDevice: return sane default value if needed
<openfpga-bot> [jtaghal] azonenberg pushed 4 new commits to master: https://git.io/fNs2O
<openfpga-bot> jtaghal/master 9a8deb5 Andrew Zonenberg: Refactoring to move a bunch of ARM stuff to architecture base classes. Added initial Cortex-M4 support
<openfpga-bot> jtaghal/master 3399dae Andrew Zonenberg: STMicroMicrocontroller: Commented out unused arguments
<openfpga-bot> jtaghal/master ce87e83 Andrew Zonenberg: SerialNumberedDevice: Removed unused variables
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<elms> Is anyone aware of an existing example of picosoc using ROM or instantiated memory instead of external flash?
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<mithro> tinyfpga: ping? Have you used picosoc with ROM?
<tinyfpga> mithro: I’ve only used it with the memory-mapped SPI
<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master: https://git.io/fNsFz
<openfpga-bot> jtaghal/master 29186dd Andrew Zonenberg: Fixed out-of-bounds read in JtagDevice (thanks asan)
<mithro> tinyfpga: What did you do before SPI flash was working? :-P
<tinyfpga> mithro: it was always working...just slowly st first
<mithro> tinyfpga: So you had it initially working without DDR?
<daveshah> mithro: from debugging down the same path myself
<daveshah> If spi flash is unreliable, make sure negedge flip flops work properly
<unixb0y> Hi guys :)
<daveshah> They are used in the SPI flash module
<tinyfpga> mithro: yes, I just used regular SPI mode without the extra IOs or DDR
<unixb0y> mithro: how’s everything going?
<mithro> Do we have a picosoc configuration which doesn't use any IO primitives?
<mithro> unixb0y: Slowly making progress
<unixb0y> Ok! 👌
<daveshah> mithro: if you don't need anything more than plain SPI you can replace the IO primitives with hard inputs and outputs
<daveshah> Obviously clock and cs just need to be outputs cl
<daveshah> Cant remember which of io0 and io1 are input or output, but easy to check on spi flash datasheet
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<openfpga-bot> jtaghal/master 3ceae70 Andrew Zonenberg: Continued work on STM32 support. Fixed lots of bugs.
<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master: https://git.io/fNshM
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<openfpga-bot> [jtaghal] azonenberg pushed 1 new commit to master: https://git.io/fNGTh
<openfpga-bot> jtaghal/master 9adc80e Andrew Zonenberg: Added print-register function to ARMv7Processor