clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<promach__> awygle: sigh, I cannot even pass my Rx yet with perfectly aligned Tx and Rx clock yet https://i.imgur.com/dD9gORD.png
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<philtor> can a picorv32 go into a BlackICE II?
<sorear> yes
<philtor> Ah, I see some info here: https://github.com/grahamedgecombe/icicle
<tpb> Title: GitHub - grahamedgecombe/icicle: 32-bit RISC-V system on chip for iCE40 FPGAs (at github.com)
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