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<xiangfu> how can I count the vias in KiCAD?
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<wpwrak> xiangfu: in pcbnew, File > Fabrication Outputs > Drill (.drl) File. The dialog that comes up has the number of vias. (Then just cancel.)
<wpwrak> hmm, does IRC have a "send when user returns" feature ? would seem useful when communicating with those who are not "always on", particularly when timeshifted
<viric> nickserv has a mailbox
<viric> when the nick identifies, gets notified of messages there
<viric> hm maybe it's not nickserv, but another freenode bot
<larsc> wpwrak: that's called email ;)
<wpwrak> bah, that's so pre-social media
<viric> wpwrak: it's memoserv. /msg memoserv help
<larsc> wpwrak: twitter should work fine as well
<wpwrak> viric: thanks ! let's see if it works :)
<viric> memoserv is both the past and the future!
<wpwrak> larsc: hmm, or maybe open a linkedin account, invite the recipient, and let linkedin flood him with nag mails
<wpwrak> viric: so you say xiangfu will have read the message i just sent now before he left some time ago ?
<viric> eh?
<viric> I can't decode your message
<larsc> timetravel
<wpwrak> that was a reference to the past. ... yup :)
<wpwrak> send message now, memoserv delivers it before it was sent.
<wpwrak> viric: kewl, works :)
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<viric> amazing technology
<wpwrak> these fancy new "electronic brains" are quite something, eh ? maybe one day, they'll even play chess
<qi-bot> [commit] Werner Almesberger: poke/: move over from svn.openmoko.org/developers/werner/poke/ (master) http://qi-hw.com/p/wernermisc/355614b
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<paul_boddie> Oh dear: http://www.bbc.co.uk/news/technology-20219292 ("Imagination challenges ARM with Mips takeover")
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<wpwrak> that may be good. other soc makers may be unwilling to license powervr if imagination are competing in the soc market.
<paul_boddie> Knowing Imagination and their highly proprietary PowerVR stuff, this probably means that they want MIPS vendors to saddle their products with it.
<wpwrak> xiangfu: you may have news from MemoServ ;-)
<paul_boddie> Obviously Intel, AMD and ARM have dumped Imagination, so they're effectively a patent troll in waiting.
<wpwrak> if you see a patent, the trolls usually aren't far ...
<paul_boddie> Actually, AMD probably never used them, but now that AMD will also produce ARM-based products, it's almost reassuring that ARM seem to have dumped PowerVR. Then again, ARM aren't completely trustworthy.
<wpwrak> from what i've heard, mali is somewhat open. not sure if that's thanks to ARM or thanks to good reverse engineers, though.
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<xiangfu> wpwrak, [File > Fabrication Outputs > Drill (.drl) File.] thanks. I got 577 vias.
<xiangfu> wpwrak, how do I know if them are blind vias or buried vias?
<xiangfu> wpwrak, do you remember, once you talking about 'azonenberg' fpga PCB board. that something is not easy for command pcb fab?
<xiangfu> something on azonenberg's board.
<xiangfu> I have 2 azonenberg board kicad files here. one is 'minimal-spartan6-tq144 2 layers board', another one is xc6slx9 ftg256 4 layers board.
<paul_boddie> What was the word on OpenRISC, by the way? I may go to a talk about that soon, and it'd be interesting to hear what people think of it in advance.
<wpwrak> xiangfu: in general, you should try to avoid fancy vias. the best are through vias. then blind. buried are worst.
<wpwrak> xiangfu: kicad doesn't seem to distinguish blind and buried in its statistics
<xiangfu> wpwrak, ok. got it. I saw those fancy vias cost more money in PCB fab. :-)
<wpwrak> xiangfu: azonenberg designs his boards to the capabilities of his pcb house. so you have to be a bit careful with his designs. they may be more demanding than necessary for a given design.
<wpwrak> fancy vias also restrict your choice of fabs. and they're harder to debug if anything goes wrong.
<wpwrak> s/for a given design/for a given circuit/
<xiangfu> wpwrak, what is the special design?
<wpwrak> what i mean is that he does some things in ways that complicate producing a board. that may include difficult via types or very narrow mechanical tolerances.
* paul_boddie is looking at http://opencores.org/or1k/Ordb2a-ep4ce22
<xiangfu> wpwrak, also there is a 'Impedance Control' like 10% or 5%. is that very important for 4 layer board?
<wpwrak> i do the other extreme :) my boards are generally meant for DIY, so all vias are very simple, there's a lot of mechanical tolerance, etc.
<wpwrak> depends on whether you have signals that need to be impedance matched :)
<wpwrak> things like RF or other high-speed signals
<xiangfu> wpwrak, (impedance matched) ok. what is the Impedance control on m1 board? do you know that?
<wpwrak> not sure if any impedance constraints were specified for M1. most of the signals there are slow. you'd have to ask adam.
<xiangfu> ok. then I think I also don't need that at all. :-)
<wpwrak> with your little FPGA board ? no, i hope not ;-)
<xiangfu> wpwrak, last question. how do I know the 'Min Annular Ring' on KiCAD?
<xiangfu> every vias cost money. :(
<xiangfu> about the Thickness (Finished Board), most common 2 or 4 layer board is 1.6mm. right?
<xiangfu> some RF board may need 0.8 or 1mm PCB board.
<wpwrak> (annular ring) that's a question from your pcb fab ? it would be either the outer diameter of vias or the difference between inner and outer diameter. not sure which.
<wpwrak> 1.6 mm is very common, yes. for small boards, you can also pick thinner pcbs. but 1.6 mm is a good default choice.
<xiangfu> wpwrak, this is the board full detail asked by PCB fab: http://pastebin.com/BNPK0vXu
<wpwrak> they could get some of the parameters simply by processing your files ...
<wpwrak> i guess they're lazy :)
<xiangfu> yes. good thing is I learned something on those questions. :-)
<xiangfu> also for calculate the order price before I send the Gerber files
* paul_boddie notes fairly recent slides, video, audio about OpenRISC at http://opencores.org/or1k/OpenRISC_Project_Meeting
<wpwrak> your vias seem a bit odd. the drill is quite large (0.3 mm / 12 mil) but the ring is narrow (only 0.1 mm)
<wpwrak> i would make the hole a bit smaller (e.g., 0.25 mm / 10 mil). maybe also grow the ring a bit, in case you want to make DIY board from these parameters.
<xiangfu> hmm...
<xiangfu> in kicad. the Via shows: Diam: 0.551mm, Drill 0.330mm.
<xiangfu> is that means ring is 0.22mm
<xiangfu> 0.221mm
<wpwrak> 0.22m / 2 for the ring width
<xiangfu> oh. yes. 0.22 / 2
<xiangfu> thanks wpwrak. I think I understand all those PCB Specification now. :)
<wpwrak> kewl :) good luck with the board !
<qi-bot> [commit] Werner Almesberger: ioscript/: script-based toggling of IO pins (for device testing) (master) http://qi-hw.com/p/ben-blinkenlights/025726e
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<wpwrak> cool. i made a line with led so bright that i still have afterimages about a minute after looking at them ;-)
<larsc> not cool...
<larsc> ;)
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<wpwrak> and was only at about a third of the maximum brightness :)
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<whitequark> wpwrak: it should be quite hot actually
<wpwrak> the board gets a little warm indeed
<whitequark> as per afterimages
<whitequark> once I tried to make a photo of myself with my smartphone
<whitequark> and due to lightning conditions in the room, I had to do it with flash
<whitequark> well
<whitequark> it was quite literally painful
<whitequark> and I wasn't able to open my eyes for at least 30 seconds after clicking the button
<whitequark> I think that flash can be used as a weapon
<whitequark> you can lit up a medium-sized room with it well enough to comfortably read 12-15pt text
<whitequark> *light
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<viric> are LED flash common?
<whitequark> viric: almost any modern smartphone has one
<whitequark> through not every one of these is as powerful of mine
<viric> ok
<whitequark> I think that samsung went a bit overboard
<viric> do they use high voltage?
<whitequark> fsvo high
<whitequark> I think that the led is actually a compound one, with 4 or maybe 6-8 dies
<whitequark> from what I know about bright LEDs
<whitequark> they're connected sequentally, hence you'd need voltages in range of 10-20V to power it
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