00:45
<
GitHub-m-labs >
artiq/master b1d349c whitequark: firmware: implement a sampling profiler....
00:45
<
GitHub-m-labs >
artiq/master 9857dfc whitequark: firmware: add irq::Exception to libboard.
01:19
<
GitHub-m-labs >
artiq/master 4f29d91 whitequark: firmware: update log_buffer....
01:19
<
GitHub-m-labs >
artiq/master 5ebc626 whitequark: artiq_coreprofile: fix an inverted option.
01:45
<
whitequark >
this lets you do e.g. `io = platform.request("io"); self.comb += [a.eq(io[0]), io[1].eq(b)]`
01:46
<
whitequark >
otherwise migen would declare the port as `output`, which seems obviously wrong and unexpected
01:49
<
cr1901_modern >
Syntactic sugar for declaring a tristate but not actually using the "enable" portion?
01:49
<
whitequark >
no, it just uses the verilog `inout` feature
01:49
<
whitequark >
you may actually want to use TSTriple anyway
01:50
<
cr1901_modern >
tbh, up until two days ago I just used "inout" and "tristate" interchangably
01:51
<
cr1901_modern >
I guess now the idea is "all tristates are inouts, but not all inouts have to be tristates"
01:56
<
whitequark >
read IEEE 1364.1-2005, too
01:57
<
cr1901_modern >
Will do tomorrow; I'm still reeling from pollen/can't think right now.
02:50
<
GitHub-m-labs >
artiq/master 8a70c18 whitequark: firmware: add debug output to hmc542 driver.
02:50
<
GitHub-m-labs >
artiq/master 68ef09e whitequark: firmware: stop profiler before rebooting too.
02:50
<
GitHub-m-labs >
artiq/master 9dc7efe whitequark: compiler: transparently handle Windows newlines in RunTool.
03:00
<
GitHub-m-labs >
artiq/master 917a418 whitequark: Unbreak 9dc7efef.
03:00
<
GitHub-m-labs >
artiq/master fd2b8d5 whitequark: firmware: raise hmc542 log level to INFO.
06:30
rqou has quit [Remote host closed the connection]
06:31
rqou has joined #m-labs
08:47
<
GitHub-m-labs >
artiq/master c646409 whitequark: firmware: fix order of bits clocked into hmc542....