sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0>
_florent_, how are things going with the sayma cards?
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<_florent_>
sb0: fine, both are working, low level link between them is also almost working, I'm creating modules to calibrate things automatically
<_florent_>
sb0: I expect that to work today, then I'll just have to put the etherbone module on top of that
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<GitHub0>
[artiq] dhslichter commented on issue #778: My sense is that SRTIO as proposed, or some variant thereof, is probably where things will need to go in the long term, but that the near-term cost and delays and debugging from implementing it appear to me (and to the others who have commented above) to be problematic relative to the "hack" fix of DRTIO with "only allocate space on the master for the DRTIO channels that are actually used", as described by
<GitHub182>
artiq/master 7eed4e7 Sebastien Bourdeauducq: synchronize introduction.rst with README
<GitHub141>
[artiq] jordens commented on issue #778: @dleibrandt I'd estimate around 8-16 SRTIO FIFOs. Making all of them large enough to handle the max backlog does not sound too restrictive if one considers that it saves a lot of unused memory from "current RTIO". Also is enlarging the FIFOs just a workaround for a small sustained event rate? If yes, then avoiding (this) SRTIO design because it makes a work around for another bottle neck harder to implemen
<GitHub199>
[artiq] dhslichter commented on issue #778: @jordens ack. Sounds like we should keep thinking about how to implement SRTIO in a good way and hammer out a good initial design spec in the near term that will handle the various issues discussed above, even as hacks are applied to the current DRTIO to keep it going. https://github.com/m-labs/artiq/issues/778#issuecomment-317097434
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<GitHub140>
[artiq] dleibrandt commented on issue #778: > Also is enlarging the FIFOs just a workaround for a small sustained event rate? If yes, then avoiding (this) SRTIO design because it makes a work around for another bottle neck harder to implement is a priority inversion. If that work around is needed and ends up hard to do with SRTIO, one should work hard on increasing the sustained event rate (any or a combination of the options that are floating ar
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