Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
<avafinger> ouch, cannot believed, removed the USB TTL debug and rebooted, voila! works
<avafinger> must limit the clk
<avafinger> Android partition are there but /dev/mmcblk0p16 and /dev/mmcblk0p11 cannot be mounted, /system and /volumn are there
<avafinger> i get "lost page write due to I/O error on /dev/mmcblk0p16" error
<avafinger> just pushed a log from the new situation, looks like there is something needed on DTS to force DDR mode
<avafinger> is there a way to extract the DTS from the eMMC (i can read it)?
<avafinger> mean DTB
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<MoeIcenowy> plaes: of course I got sdcard working...
<MoeIcenowy> is your master 4.9 or 4.10?
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<plaes> MoeIcenowy: 4.10
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<montjoie> plaes: happy to see i am not the only one to have this error:)
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<montjoie> all my bisect go to a mripard patch in 4.9 rc, but 4.9 works. It is really strange
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<plaes> which patch?
<crzyp3ck> which is better? for usb <->uart connection. cp2102 adapter or pl2303hx?
<plaes> no difference for regular uart
<crzyp3ck> plaes: considering that my pc is linux system and for the future use (who knows what I want to do with it in the future) which one would be the better choice?
<crzyp3ck> plaes: ????
<plaes> both are fine
<plaes> for 99% of sunxi you only need GND, RX, TX
<crzyp3ck> plaes: no difference?
<plaes> nope
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<crzyp3ck> plaes: do any of them need driver to work? software driver?
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<plaes> what distro are you using?
<plaes> anyway, looks like I use them both because the modules are loaded on my machine
<plaes> lsmod |egrep -e '(cp21|pl23)'
<plaes> pl2303 20480 0
<plaes> cp210x 28672 0
<plaes> on at least Ubuntu/Fedora they get loaded automatically when inserting hw
<plaes> so don't worry
<KotCzarny> crzyp3ck: they are cheap, get both
<KotCzarny> ;)
<KotCzarny> but as plaes have said, for regular work it doesnt matter
<KotCzarny> as long they are 3.3V versions
<crzyp3ck> it is slackware 14.2 and openbsd -current
<crzyp3ck> KotCzarny: np
<crzyp3ck> :)
<KotCzarny> and they should be detected automagically, unless you've compiled your own kernel and forgot to include serial dongles drivers
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<KotCzarny> do lsusb or dmesg first to confirm insertion was detected
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<crzyp3ck> ok
<crzyp3ck> dmesg kernel modules ; will do
<crzyp3ck> tnx
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<montjoie> plaes: the cmmit is f233dbca6227703eaae2f67d6d9c79819773f16b pinctrl: sunxi: Rework the pin config building code
<montjoie> but clearly git bisect bug
<montjoie> bisecting between 4.9 and 4.10rc1 CANNOT go outside this interval
<montjoie> "must not" is the better word
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<montjoie> the problem come with "Merge tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl"
<plaes> but it might actually configure pins wrong
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<montjoie> plaes: could you try to bisect your problem and confirm it is the same ?
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<MoeIcenowy> jemk: I am refactoring the V3s DRAM code to get it merged into mainline
<MoeIcenowy> your guess about 32BIT should be FULL_WIDTH and 16BIT should be HALF_WIDTH seems to be true
<MoeIcenowy> the evidence is dram_sun8i_a33.h ;-)
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<tuxillo> hi
<tuxillo> pine64 does not have one of those spi flash like the one in opi0 right?
<KotCzarny> nope. it's orange thing, you can try using spi on gpio header though
<tuxillo> yeah, I've seen that in the wiki
<tuxillo> it's ugly :)
<KotCzarny> make it pretty then
<KotCzarny> it's diy no matter what
<tuxillo> how you mean? that I design something that is prettier? :P
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<MoeIcenowy> tuxillo: a external SPI "hat" that can be directly inserted on Pi-compatible headers will be cool ;-)
<wens> morning, switched timezones to PST
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<MoeIcenowy> morning although I am still at CST
<wens> CST is one of the confusing abbreviations :p
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<likewise> good morning all, I am on IRC time :)
<likewise> although I should cook evening dinner now
<MoeIcenowy> to be honest I should go sleep now ;-)
<MoeIcenowy> it's 01:43 here
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<willmore> 12:48 pm here. Aren't time zones wonderful?
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<Pepe> 19:03 here
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<KotCzarny> 19pm
<KotCzarny> well, 7pm
<willmore> Probably more.
<KotCzarny> isnt it stupid to see trivial linux things describes the same way as decrypting strong cryptos?
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<willmore> But, they were l33t h4x0r5, man!
<KotCzarny> still, dishonor for real hackers/crackers
<willmore> Agreed
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<the_reverend> Good evening linux-sunxi people
<the_reverend> I have a quick question about mac address stability on a machine like the OPi0
<KotCzarny> the_reverend: no max in hardware, uboot sets it from machine id
<KotCzarny> s/max/mac/
<KotCzarny> and linux picks it up from uboot (or generates own)
<the_reverend> So, if I duplicated a mainline Armbian installation and placed the sd card in a new Orange Pi Zero, the new machine would obtain a new mac to the old machine
<the_reverend> ?
<KotCzarny> should.
<the_reverend> Ok sweet, I'll try it. There's a project I'm working on that might need tens/hundreds of the little buggers (all with same IP config, etc). I'm hoping that I can get an image working perfectly, mount it on a Linux VM and just script the small differences that each image needs (hostname)
<the_reverend> I always thought MAC addresses were written in stone before encountering these little board. I've stuff to learn here.
<KotCzarny> cheap hardware is cheap
<the_reverend> Cheap hardware is great. I think I must enjoy the heartache. You guys certainly must ;)
<the_reverend> Thanks for all the work you do
<KotCzarny> i am.
<KotCzarny> cheap, low power and stable enough
<the_reverend> Remarkable, really remarkably powerful
<KotCzarny> we will yet have to see about longevity
<KotCzarny> if you want powerful, look for socs with a15/17 cores
<KotCzarny> might be old, but much faster
<the_reverend> I'm running one as an ad-blocking DNS server for 100+ simultaneous users. Doesn't even break sweat
<the_reverend> Opi0
<KotCzarny> yeah, for that its more than enough
<KotCzarny> even old rpi would suffice i guess
<the_reverend> Next project involves flying a Orange Pi, an LTE modem and a Ubiquiti 5GHz radio 60 metres up in the air under a helium balloon at sea :)
<the_reverend> Streaming HD video back from a rib boat to a main ship :D
<KotCzarny> o.O
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<KotCzarny> if you do that, dont forget to drop the link :)
<the_reverend> drop a link?
<KotCzarny> of the video
<the_reverend> For sure, I certainly will
<the_reverend> It's for volunteer lifeboats
<apritzel> the_reverend: MACs aren't even set in stone on PCs
<KotCzarny> apritzel: they are set in firmware though
<the_reverend> We're going to have an omnidirectional antenna on the balloon and a directional antenna on the speedboat on a gimbal,
<KotCzarny> which is almost the same
<apritzel> you can set them in Linux, if you like
<the_reverend> there will be an orange pi on that to make sure the directional antenna always points at the balloon!
<KotCzarny> apritzel: but they will change back on reboot
<apritzel> and the driver usually programs them from some non-volatile storage
<apritzel> and this is the part that cheap vendors save
<the_reverend> yeah, i learned that only recently. its why using mac addresses to control access to networks is a bad idea ;)
<apritzel> it's good to get longer access to airport WiFis, for instance ;-)
<the_reverend> yeah, a good idea for users :D
<the_reverend> so does u-boot use some kind of hash to generate the macs from a unique id, like a cpu serial number or something?
<apritzel> the_reverend: exactly
<KotCzarny> which recently changed, because that unique id was read bugged
<KotCzarny> ;)
<KotCzarny> for h3
<KotCzarny> but all is well now
<the_reverend> great! thanks for the info people, i asked on the Armbian forums but I think the knowledgeable folks there are constantly overwhelmed by slightly more basic questions
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<the_reverend> have a great weekend, adios!
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<apritzel> was that comment about knowledgeable people ironic?
<KotCzarny> maybe he met tkaiser
<KotCzarny> he does that to people
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<the_reverend> the mods there know what they're doing
<the_reverend> many of the users, really, really don't though
<KotCzarny> that's true, and that's what forums and search function is for
<KotCzarny> ie. shared knowledge gets shared
<the_reverend> low signal to noise on occasion, low modulation, low throughput :D
<the_reverend> I try to help along, like suggesting that people ask new questions in new threads with clear titles
<the_reverend> so that *others* can find the answers
<the_reverend> the entirety of my knowledge is based on googleable information :"D
<the_reverend> But I honestly think that people playing with these cheap boards are going to do incredibly cool stuff... if they don't get on the wrong side of Herr T Kaiser :p
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<the_reverend> tkaiser: if I'm reading that code right it seems that the OPi0 has a mac address set randomly at first boot, so is an exception to what KotCzarny said about uboot :(
<the_reverend> why is that?
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<tkaiser> the_reverend: that's how the MAC address is set in Armbian now on OPi Zero. No idea why anyone tells you different things.
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<the_reverend> cheers for the headsup. the code seems to target only for OPi0, are the addresses for the others set by uboot?
<KotCzarny> funny, why you do exception for opi0?
<tkaiser> KotCzarny: Since the driver sets a random address on each boot. At least the legacy driver. Same with Pine64 BTW (legacy / Ethernet).
<KotCzarny> isnt uboot setting same address on h3/h2+ based on unchanging SID ?
<tkaiser> the_reverend: It depends always on the driver what has to be done. Armbian images with mainline kernel are not meant for end users ATM.
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<tkaiser> KotCzarny: Who cares? If the driver doesn't pick up the address, the address has to be set somewhere. And no one is touching the smelly XR819 legacy driver.
<tkaiser> So you described the future but now users have to take care when they want to copy over OS images from one device to another (same with Pine64!)
<KotCzarny> we are talking about ethernet or wifi?
<tkaiser> KotCzarny: OPi Zero: WiFi, Pine64/legacy: Ethernet
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<KotCzarny> my understanding with reverend's question was about ethernet
<KotCzarny> if he was asking about wifi, then my bad
<the_reverend> Yup, only using etherenet. Not touching OPi0 Wi-Fi for a long time
<the_reverend> If ever :D
<tkaiser> Ok, then I was wrong. With Ethernet MAC address depends on SID (and algorithm changes)
<KotCzarny> yeah. but using same image on different boards should be safe
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<the_reverend> No worries, but useful info indeed :tkaiser we may at some point make use of the Wi-Fi on those boards so it's very useful to know that currently I'd end up with cloned Wi-Fi macs
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<KotCzarny> fun to debug ;)
<the_reverend> hahaha I spent 3 days over Christmas nearly throwing a router out of the window
<the_reverend> I ran out of swear words
<the_reverend> I hardly slept
<the_reverend> The answer, a limitation in Ubiquiti/VyOS load-balancing set-up and a Huawei USB modem that when without SIM pretends to be every site on the internet
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<the_reverend> Responds to pings for everything
<the_reverend> o_O
<KotCzarny> kind of windowsish thing, hide the problem, here see this very colorful, yet zero information page
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<AneoX> Hi! Please, maybe somebody could help me, with A20 uart high baud? I have changed apb1 clock, and got strange behavior. All baud rates calculation become twice bigger. Apb1 was 24mhz, i have set to 96(also 144 tried). Now if i set 250000 rate in my app, actually got ~510638, instead of 1000000, got 2181818, etc
<AneoX> f1c28c00 register always is 0
<AneoX> f1c28c04 always 0x5
<AneoX> its UART_DLL and UART_DLH addresses of uart 3
<AneoX> i have tried mannually change UART_DLH, but when app starts to communicate, UART_DLH become 0x5 back
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<apritzel> AneoX: which SoC was that again?
<apritzel> Are you sure that APB1 is actually at 96 MHz?
<ElBarto> apritzel: does this readme is up to date : https://github.com/apritzel/u-boot/blob/pine64-spl-wip/board/sunxi/README.pine64 ?
<ElBarto> apritzel: following it I have SPL booting but it don't go further
<AneoX> A20
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<AneoX> yes, sure, cat /proc/ccmu | grep -i apb1 shows correct info
<apritzel> ElBarto: on an SD card? And did you actually use that tree as well? With ATF bundled into the FIT image?
<apritzel> AneoX: so you changed APB1 source to be PLL6, I suppose?
<ElBarto> apritzel: yes on a SD, same tree with ATF from your allwinner branch
<apritzel> AneoX: which is what frequency? 1200 MHz? 600 MHz?
<AneoX> yes, and udjust pll6 clock to adble int div to 16
<AneoX> pll6 to 576MHz
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<AneoX> apritzel: please take a look http://pastebin.com/Nu31tJB3
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<AneoX> seems like apb1 clock source not directly from pll6, its source is half of pll6, AW_SYS_CLK_PLL62
<apritzel> AneoX: APB1 source can be PLL6, which I read as being (24 MHz * N * K) / 2
<apritzel> AneoX: that's different from PLL6*2
<apritzel> AneoX: this is a legacy kernel, right?
<AneoX> yes, should i try change AW_SYS_CLK_PLL62 to AW_SYS_CLK_PLL6 ?
<apritzel> So don't know which clock you are actually programming
<apritzel> I guess so
<apritzel> ElBarto: so you just see the SPL output, and nothing from ATF?
<ElBarto> apritzel: exactly
<ElBarto> apritzel: a quick hexdump confirm that everything is in the right offset
<apritzel> the FIT at sector 80 (40KB) of the SD card?
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<ElBarto> A000 so yes
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<AneoX> apritzel : now [ccu-err] clk_set_parent: set apb1 parent to sata_pll failed
<AneoX> sata_pll its AW_SYS_CLK_PLL6
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<apritzel> ElBarto: can you try: tools/mkimage -E -f sun50i_atf.its sun50i-a64.itb
<apritzel> ElBarto: for creating the FIT image
<apritzel> ElBarto: so adding -E, to append the binaries to the DT and not embed them?
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<apritzel> ElBarto: I think that's missing in the README
<AneoX> apritzel: if take a look at ccm sources in legacy kernel, looks like it want to use AW_SYS_CLK_PLL62 with apb1, AW_SYS_CLK_PLL62 it is a half clock of AW_SYS_CLK_PLL6, example from sources http://pastebin.com/hwXFwNwN
<ElBarto> apritzel: that worked thanks !
<ElBarto> apritzel: also path to the its is wrong in your readme
<ElBarto> (but this I got before :P)
<apritzel> ElBarto: I know, but then again the branch is called -wip ;-)
<ElBarto> apritzel: thanks a lot, having ethernet would be easier for me for FreeBSD dev
<apritzel> eventually the FIT source should end up in that directory
<ElBarto> ok, good to know
<ElBarto> apritzel: is this branch is what you've sent upstream recently ? (I haven't really reading the mails)
<apritzel> ElBarto: no, actually it's quite outdated, but the only branch I published with FIT support
<apritzel> I am about to change that, though
<ElBarto> ok cool, thanks again
<AneoX> apritzel AW_SYS_CLK_PLL62 writes 1 in apb1 clk source, so CCM_APB1_CLK_SRC = 1 is correct pll6 http://linux-sunxi.org/Clock_Control_Module#CCM_APB1_CLK_DIV_CFG
<AneoX> apritzel: so apb1 correctly was set to 96mhz, but uart is glitch
<AneoX> please help, any ideas?
<apritzel> AneoX: so yes, PLL6 is the clock source, but to what frequency is it actually programmed? To 576 MHz, 1152, 288 MHz?
<AneoX> 576
<apritzel> AneoX: I take it the frequency you set is 576, but you program PLL62
<apritzel> either you program PLL6 or you use 1152 MHz
<AneoX> pll6 is 576. But apb1 seems to get pll6/2, its kernel doing. Do you think somebody made a mistake with it?
<apritzel> AneoX: or the manual is wrong and the source is actually PLL62, so twice the frequency
<AneoX> not twice, pll62 is a half
<AneoX> 576 /2
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<apritzel> are you sure of that? that seems to be inconsistent between manual and BSP code then
<apritzel> the manual says the frequency of PLL6 is (24*N*K)/2 and PLL6*2 is 24*N*K
<apritzel> AneoX: I don't know if those values are real, as they reflect the modelled frequency, not the actual one
<apritzel> AneoX: and the A64 for instance uses the doubled frequency as the clock source
<AneoX> 288 is a half of 576, so kernel is divide pll6 to 2, not multiply
<AneoX> comment in ccm_sys_clk.c line 994: /* rate of AW_SYS_CLK_PLL62 is always the half of the rate of AW_SYS_CLK_PLL6 */
<AneoX> case AW_SYS_CLK_PLL62: return (__s64)24000000*aw_ccu_reg->Pll6Ctl.FactorN*(aw_ccu_reg->Pll6Ctl.FactorK + 1)>>1;
<AneoX> shift right way, its divide as i remember
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<AneoX> of sorry, it was sun5i . for sun7i i found case AW_SYS_CLK_PLL62: return (__s64)24000000 * aw_ccu_reg->Pll6Ctl.FactorN * (aw_ccu_reg->Pll6Ctl.FactorK + 1) >> 2;
<AneoX> also case AW_SYS_CLK_PLL6X2: return (__s64)24000000 * aw_ccu_reg->Pll6Ctl.FactorN * (aw_ccu_reg->Pll6Ctl.FactorK + 1);
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<AneoX> so as you said, PLL6 is (24*N*K)/2, but PLL62 PLL6 is (24*N*K)/4
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<apritzel> AneoX: mainline seems to use 24*N*K/2 for the APB1 source
<apritzel> and there is a /4 clock as well, as a possible input for AHB
<apritzel> AneoX: so PLL62 seems to mean "divided by 2" in the BSP
<apritzel> AneoX: is there a normal AW_SYS_CLK_PLL6 clock in that code?
<apritzel> or only PLL6X2 and PLL62?
<AneoX> case AW_SYS_CLK_PLL6: { return (__s64)24000000 * aw_ccu_reg->Pll6Ctl.FactorN * (aw_ccu_reg->Pll6Ctl.FactorK + 1) >> 1;
<apritzel> so my hunch is that 24*N*K/2 is the actual APB1 input
<apritzel> although you
<AneoX> so i need to change some kernel code
<apritzel> ...r clk_set_parent(clk, tmpClk) seems to set PLL62 as the source
<apritzel> that may be modelled wrong in the kernel
<AneoX> yes, but if i tryed pll6, its fails. need some correction
<apritzel> so that seems to be the bug:
<AneoX> will try now
<apritzel> the kernel thinks that PLL62 is the clock source and computes the frequencies accordingly
<apritzel> but actually it's PLL6, so it's off by factor 2
<apritzel> AneoX: I assume it only accepts certain clocks as the parent of APB1, so setting PLL6 will be denied
<apritzel> AneoX: as the kernel believes that is not possible to program
<AneoX> i understood, need correct possibles parents
<apritzel> exactly
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<AneoX> looks it works, pll6 now is a parent clock 576 of apb1. uart0 works at 115200 as expected. BUT, half of kernel modules are failed. usb wifi not works, mali, ump, lcd and others )))
<AneoX> apritzel: any ideas?)))
<apritzel> because you shouldn't change PLL6, really
<apritzel> I was wondering about that already
<apritzel> half of the system depends on PLL6
<apritzel> which in turn means you can't have every possible frequency for the UART, unfortunately
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<apritzel> but 100 MHz should work, for instance
<AneoX> it was 600, i have changed to 576 and all systems works, until i change apb1 clock
<apritzel> so does it actually program PLL6 to 96 MHz instead of 576 and setting the APB1 divider to 6?
<AneoX> no )))
<AneoX> PLL6 is 576, but APB1 is 96
<apritzel> can you dump the actual APB1 clock divide ratio register and check that?
<apritzel> it should read 0x01000005
<AneoX> cat /proc/ccmu | grep -i apb1 says: Apb1ClkDiv.ClkDiv:2 Apb1ClkDiv.PreDiv:1 Apb1ClkDiv.ClkSrc:1
<AneoX> cant modprobe sunxi_dbgreg in this state, as another modules. libkmod: ERROR ../libkmod/libkmod.c:554 kmod_search_moddep: could not open moddep file '/lib/modules/3.4.103-gb56f56d-dirty/modules.dep.bin'
<apritzel> that seems to be correct as well: / 3 / 2 = /6
<AneoX> yes it is, my patch outputs the same info http://pastebin.com/mAHqy64q
<AneoX> for example mmc uses pll6 and [mmc-msg] sdc0 set round clock 44307693, src 576000000
<AneoX> seems like pll6 works well with same 576, no change
<AneoX> but for some reason modules not loading
<AneoX> lsmod is empty
<AneoX> ohhh sorry)
<AneoX> dir 3.4.103-gb56f56d changed to 3.4.103-gb56f56d-dirty after kernel compile
<AneoX> now will reboot and test uart with new apb1 speed, thank you very much! ) hope will work