Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<willmore> ssvb, any pointers to dual SPI you can give would be appreciated. The block diagram in the H5 manual didn't give any indication that such a thing was possible. But I just did a quick look.
<willmore> I'd be glad to do some testing of possible/reliable speeds once I get my parts in house.
<willmore> Winbond specs their chips to 104MHz, so if Allwinners spec of 100MHz is true.... I'll eat my shirt.
<willmore> apritzel, good point. I figured they would be useful for something like that. They've been living in 4MB of flash machines for years. 16MB should feel spacious.
<apritzel> willmore: indeed, that was my thinking
<apritzel> IIRC they load everything into RAM, but allow to sync back into flash when needed
<apritzel> and given that AW boards have plenty of RAM compared to most routers, that should be a nice fit
<ssvb> willmore: the H5 user manual says the following about SPI: "Supports single and dual read mode"
<ssvb> willmore: some information is also available in the SPI controller hardware registers descriptions
<willmore> apritzel, agreed.
<willmore> ssvb, good point, but I didn't see the signals needed. I guess they have MISO and MOSI in/out. Those could be retasked...
<willmore> Time to break out the scope.
<ssvb> willmore: check the "9.2.3.5. SPI Dual Read Mode" section in the manual
<willmore> I wonder if the necessary pins are available on my Opi1
<ssvb> yes, they are available
<ssvb> both MOSI and MISO pins are used to transfer data
<ssvb> and they are obviously connected to the chip
<willmore> ssvb, that's what I get for skimming.
<willmore> Time to break out the scope.
<willmore> ssvb, the H3 datasheet mentions the dual read mode, but has no similar section to 9.2.3.5
<willmore> Or I'm just missing it again.
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<willmore> But the register definitions seem similar--there's a dual mode read bit.
<ssvb> willmore: yes, the H3 manual does not have this section, and in fact I did not have this H5 manual when I was experimenting with SPI
<ssvb> I found the documentation a little bit incomplete/ambiguous
<willmore> I can use an esp8266 module as a reference comparison as they support SPI, dual-SPI, and QPI with their flash.
<willmore> ssvb, yeah, no kidding. :)
<willmore> brb.
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<crzyp3ck> (۰۱:۰۰:۰۲) crzyp3ck: http://2.1m.yt/DyU5-aL.jpg
<crzyp3ck> (۰۱:۰۰:۵۰) crzyp3ck: http://2.1m.yt/bNakfiD.jpg
<crzyp3ck> (۰۱:۰۱:۳۳) crzyp3ck: http://2.1m.yt/PP-ECBE.jpg
<crzyp3ck> could you tell me where are the uart pads? where are the jtag pads?
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<rellla> crzyp3ck: tx/rx smells like them...
<rellla> and NDH means NewDeviceHowto
<crzyp3ck> rellla: the NDH wiki page didn't help.
<crzyp3ck> it all comes to finding uart/jtag pads(pins)
<rellla> crzyp3ck: you should fill it first, so that others can help you
<crzyp3ck> which I can't
<crzyp3ck> which I can't find them
<BenG83> it´s a TFQP package maybe you can use a multimeter to check the test pads on the bottom
<BenG83> didn´t you find pads with TX/RX markings?
<BenG83> is there a datasheet with a A13 pinout?
<silviop> A13 tx/rx are mixed in sd card
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<crzyp3ck> BenG83: yes there is tx/rx on the board but they don't give me a cmd/shell acess.
<crzyp3ck> access
<KotCzarny> how did you connect them?
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<crzyp3ck> KotCzarny: I did solder them. then used pl2303 ttl/usb adapter
<KotCzarny> are they named or you guessed which are which?
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<crzyp3ck> KotCzarny: http://2.1m.yt/PP-ECBE.jpg yes tx rx and an unnamed pad beside them
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<crzyp3ck> did anyboady find the uart or jtag pin outs?
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<terra854> Hey guys, one of the members of the Pine community has figured out why the Pine sometimes doesnt turn on after a shutdown. (As in, running "shutdown -h now" and then holding the power button for a few seconds to turn it back on)
<terra854> Posted here just in case this bit of info is useful for adding AXPxxx PMIC support to the mainline kernel.
<terra854> (BTW it's AXP803 for the Pine A64)
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<montjoie> just finished sun8i-stmmac support for internal phy, will push code soon
<jelle> nice!
<montjoie> perhaps I could start sent it for review within a month
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<KotCzarny> crzyp3ck: and i assume you've connected pad tx to usb dongle rx, pad rx to usb dongle tx and gnd to gnd??
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<KotCzarny> eh, he left
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<tllim> Regarding FOSDEM gethering, PINE64 will have same dinner place as Sunxi on Feb 4, 8pm.
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<KotCzarny> crzyp3ck: and i assume you've connected pad tx to usb dongle rx, pad rx to usb dongle tx and gnd to gnd?
<crzyp3ck> KotCzarny: yes.
<crzyp3ck> KotCzarny: sorry for the delay. my connection was a bit doggy . !
<KotCzarny> crzyp3ck: no worries, i was also out in the city
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<fatius> hi! I'm trying to build a mainline kernel for orange pi pc, i'm getting close, I think but I'm stuck at this error, which repeats forever: "sunxi-mmc 1c0f000.mmc: fatal err update clk timeout"
<fatius> Any pointers on where to look to figure out what I'm doing wrong?
<apritzel> fatius: this is a known bug nobody has had time yet to investigate
<apritzel> doesn't happen with 4.9, also linux-next seems to work reportedly
<fatius> apritzel: oh cool. I'll DL 4.9 and give it a shot.
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<fatius> apritzel: thanks for the tip(s)
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