<shineworld>
oliv3r, do you got my same problems with git ?
<oliv3r>
shineworld: it clones VERY slowly, but it's cloing
<oliv3r>
3% of receiving objects :)
<shineworld>
I catch problems after 100%
<oliv3r>
resolving deltas now
<oliv3r>
fatal: cannot create directory at 'arch/parisc/kernel': No space left on device
<oliv3r>
crap :p
<n01>
lol
<n01>
'moning btw
<oliv3r>
good morning
<shineworld>
ok so I will try to clone another time
<n01>
shineworld: I'll try to clone
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<oliv3r>
almost done cloneing :)
<Dreadlish>
ehm
<oliv3r>
2 MiB/s
<Dreadlish>
.git directory weights about 1,3GB ;d
<shineworld>
many branches :)
<Dreadlish>
and if its doing it slowly, blame github
<shineworld>
overall is a free service
<oliv3r>
github dorks and works well
<oliv3r>
though i admit, it's a bit slow today
<shineworld>
ok I will clone .. thank you for fix
<oliv3r>
but lets be honest, 3 MiB/s is still fast
<oliv3r>
shineworld: mine is resolving delta's now, almost done
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<n01>
[OT] github or bitbucket? the new bitbucket seems as good as github
<oliv3r>
shineworld: cloned fine
<oliv3r>
haven't seen the new bitbucket
<shineworld>
I'm cloning too ... thank you
<shineworld>
just if you know: there is a way to notify system the real display dimensions ? with script.fex I can only pass widht and height in pixels, so framebuffer found widht and height = 0 and use 160dpi by default.
<n01>
shineworld, oliv3r: remote: aborting due to possible repository corruption on the remote side.
<n01>
wtf
<oliv3r>
overload
<oliv3r>
it cloned fine here
<oliv3r>
shineworld: no idea, sorry
<shineworld>
I'm a 10% (my wimax net is very slow .... 270 KiB/s)
<shineworld>
oliv3r, ok, when I find a good solution I will report here
<oliv3r>
shineworld: wiki is better :)
<paulk-desktop>
hi
<oliv3r>
hello
<paulk-desktop>
so I got android to start, however I lack touchscreen drivers for my a13 tablet
<gzamboni>
remote: aborting due to possible repository corruption on the remote side.
<gzamboni>
fatal: early EOF
<gzamboni>
fatal: index-pack failed
<gzamboni>
:( git clone again
<shineworld>
I was able after 3 retries
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<oliv3r>
paulk-desktop: would be easier if I knew how to grep amonst multiple branches in one go :)
<oliv3r>
paulk-desktop: but looks like you may have to search for it elsewhere; allwinner doesn't have it in its repo's
<paulk-desktop>
I guess so, indeed :)
<oliv3r>
paulk-desktop: obviously if you do get your hands on a datasheet (i can help if you can't find any source) we can put it on the wiki; and if you have code, we can host it :)
<oliv3r>
gzamboni: yeah github is beig extremly slow
<oliv3r>
funny to see leftovers from the AW_FPGA_pLATFROM development stages
<oliv3r>
slapin: ping
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<jorgegeorge>
I'm having trouble on cloning: "remote: aborting due to possible repository corruption on the remote side"
<oliv3r>
jorgegeorge: github is being iffy today
<oliv3r>
try again and it should go through
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<oliv3r>
wingrime: ping
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<wingrime>
pong
<oliv3r>
wingrime: hey, i saw you updated the sram page; i'm redoing the math there for the A10 (from the datasheet, i noticed some really sloppy mistakes :p)
<oliv3r>
anyhow, howcome the A13 has only 48 kiB A memory? the datasheet looks like the SRAM is identical
<oliv3r>
though the Video Encoder (C1) really appears to be 512 kiB; which is a LOT! i guess if you disable cedarX, you could evne clame C1 :p
<oliv3r>
claim*
<oliv3r>
i wonder if you can claim it for SPL;
<wingrime>
oliv3r: we can even drop SPL
<oliv3r>
with 512kb? probly:)
<wingrime>
oliv3r: I smply wireed datasheet info
<oliv3r>
wingrime: but i think we are still limited by the 20k load limit of the BROM; it will only read max 20 kiB
<oliv3r>
but you can chainload it calris said
<oliv3r>
wingrime: hmm, the A13 datasheet also says 64k of Sram A
<wingrime>
oliv3r: see secttions
<oliv3r>
wingrime: i made some ugly typo's and horrible math on A10 sram section
<oliv3r>
oh yeah!
<oliv3r>
a10 is same, 48k of SRAM A
<wingrime>
oliv3r: 512 kb it need confurm
<wingrime>
oliv3r: it maybe still unmapped
<oliv3r>
wingrime: well it'll need some heavy testing
<oliv3r>
wingrime: but if it is truely for the Video Encoder/Decoder
<oliv3r>
SPL should be able to claim it
<oliv3r>
and I can understand the huge memory requirement
<oliv3r>
you have to have some big buffers to decode those frames in
<oliv3r>
quad HD
<oliv3r>
2160k
<wingrime>
512 too small for it
<wingrime>
it may be cache
<oliv3r>
well you can store some blocks of data :p
<oliv3r>
not all of it, but big junks
<oliv3r>
you need to be able to keep the decoder satisfied
<oliv3r>
not good having ac ash runderrun
<wingrime>
olvi3r: make sure that umaped spaces can be saved somewhere else
<oliv3r>
CPU lvl2 cache seems to be smaller
<oliv3r>
if you can confirm it really is 128k; then that's the big difference
<oliv3r>
but it should be the same i've heard
<oliv3r>
wingrime: dump to SD card at bootup to examine?
<oliv3r>
wingrime: but every powercycle should restore sram C
<wingrime>
wirire random file to whole sram
<wingrime>
wirire and dump
<oliv3r>
aye calris was testing things in that regard
<oliv3r>
write generated data in there, and check its known CRC value
<oliv3r>
no need to dump then
<oliv3r>
dump can be done from console
<wingrime>
simply say if hi bits of address not connected xx111110x0 if you will write "to 1111111x0" you actualy will write 00111111x0
<wingrime>
I saw this with som SOC
<wingrime>
I dumped whole address space
<oliv3r>
once i have my microSD breakout board; i'll test
<oliv3r>
sd -> uart
<wingrime>
and bootrom have repeated maytimes
<oliv3r>
wingrime: hm?
<wingrime>
Soc Have some PROM
<wingrime>
that started form 0x0
<wingrime>
and repeated may times
<wingrime>
Simply say, HI address bits was unwired
<wingrime>
I read xxxx00000x0 and get 0000000x0
<wingrime>
so it like warning to you, You may write to some other place
<wingrime>
it simple undestandable effect
<wingrime>
Can you wirte a10 full memory map
<wingrime>
?
<oliv3r>
wingrime: BROM, bootrom
<oliv3r>
haven't tried, don't have SD Breakout board yet :(
<oliv3r>
hopefully next week or in two weeks
<oliv3r>
wingrime: is there anyway we can 'test' the amount of cache (runtime) that we have?
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<oliv3r>
I strongly think the datasheet may be wrong with 128 kiB L2 cache for A13
<wingrime>
maybe
<wingrime>
I prefer use All sram for cpu cahce
<oliv3r>
and I strongly think, that C2 may be useable on A13 (from SPL atleast)
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<wingrime>
WFT: Default value A10: 0x00001300
<oliv3r>
wingrime: well you can use C1; when not using cedarx :)
<oliv3r>
wingrime: probably bug in datasheet
<wingrime>
you realy think that you write
<wingrime>
0xff - 32 bit register
<wingrime>
It can have only 2 hex digs
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<oliv3r>
0xffff yeah
<oliv3r>
probably should have rounded it down :p
<oliv3r>
but some registers have 0x7ffffffff as default
<oliv3r>
explain that :)
<wingrime>
oliv3r remove sunx4i/sun5i add A10 and A11 row
<wingrime>
and fill with "x" and "-"
<oliv3r>
wingrime: probably better :p
<wingrime>
also add "Usable"
<wingrime>
and remove "possibly used by AHB"
<wingrime>
and in usable "?" "Y" "N" with reference to bottom
<oliv3r>
I had useable :p
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<oliv3r>
hmm, i changed sun4i to x -; but it's gone now i'll try again later
<oliv3r>
wingrime: maybe you can use C2 for cache :)
<oliv3r>
try it!
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<wingrime>
oliv3r: It may be not possible
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<mdp>
hno, do you have plans to repost your u-boot patches upstream?
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<Tartarus>
Things do look cleaner than when the series was posted last
<mdp>
Tartarus, in u-boot-sunxi.git, you mean, right?
<Tartarus>
Yes.
<oliv3r>
wingrime: if C2 is not wired inside the sun5i soc, no; otherwise, maybe!
<oliv3r>
i saw more recent work in hno's personal git repository i think; or atleast upstream merged back in
<oliv3r>
mdp: are you working on the dma driver? do you have a git repository for it?
<wingrime>
oliv3r: Physical CPU memory space are defined using AHB
<mdp>
oliv3r: yeah, was that you that mailed me? I'm still recovering from the holiday weekend and haven't replied to everything :-/
<wingrime>
oliv3r: CPU caches connected directly to cpu
<oliv3r>
mdp: i probably haven't; wingrime has been investigating the DMA heavily the past few days :)
<mdp>
oliv3r: I should have a branch up shortly with the spi driver...I only have a skeleton of the dmaengine driver
<oliv3r>
mdp: cool :) you do read the sunxi-ml though?
<mdp>
oliv3r: essentially the approach is that I really need a slave driver that uses normal/direct dma first...it's not much use without a client driver
<mdp>
oliv3r: still getting caught up on things, but yeah
<oliv3r>
mdp: i know nothing about dma :( wingrime has dug a lot. He did find something rather interesting. the MMC controller may have its own way of doing dma
<mdp>
oliv3r: it does..it has its own dma controller
<oliv3r>
mdp: actually, I know little of anything :)
<wingrime>
mpd: you have finite state machine rtansit table ?
<oliv3r>
mdp: should I think of this, like in the 'pc' world, one 'channel' for mmc, 1 for 'the rest?
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<oliv3r>
I've only started to read lddp3 it think it was called and read the dma chapter
<oliv3r>
wingrime: you think the nand controllers' 2 kiB connect directly aswell?
<mdp>
the sunxi mmc block doesn't use the normal/direct dma
<wingrime>
Yes
<mdp>
so the mainline progress page seems to imply that it's blocked on "dma", meaning dmaengine, when its not
<wingrime>
mpd : mmc have internal dma engine
<oliv3r>
mdp: i changed that this weekend allready :p
<mdp>
right
<mdp>
ahh, ok
<oliv3r>
well mentioned it is more the like
<oliv3r>
i think i saw in boot0 code, that it can work with and without dma aswell (but my memory may be off here)
<oliv3r>
haven't checked u-boot SPL code if it uses dma actually
<wingrime>
oliv3r: who tested "B" on a13 ?
<oliv3r>
wingrime: on a13? nobody you! if you can access u-boot console
<mdp>
for upstream, it's always ideal to design the driver to work in pio-only mode as well...if the block works without it
<mdp>
that was a major mistake TI made on the omap driver not separating it cleanly ;)
<oliv3r>
:)
<mdp>
whereas most others allow for pio only operation
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<mdp>
oliv3r: so I'm actually focused again on this and should have some working branches posted in my github tree soonish
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<oliv3r>
mdp: what's your github? /mdp/?
<mdp>
github.com/ohporter/linux
<mdp>
hey, so one thing, are we done with #arm-netbook for devel discussions now? I'd like to prune a needless channel from my list ;)
<oliv3r>
mdp: i'm not on arm-netbook anymore :p I was there for sunxi discussions, and while I think they do great work there, i don't have any hardware from there :p
<oliv3r>
so i think yes, if all you 'care' about is sunxi; this is the place
<mdp>
ok, that's all I care about ;)
<wingrime>
mdp: you realy work in TI
<mdp>
that's my day job, yes
<oliv3r>
mdp: no conflict of interest here? :)
<mdp>
no
<wingrime>
mdp: TI have nice msp430 mcu
<oliv3r>
awesome
<Dreadlish>
yup
<mdp>
wingrime: I have several
<Dreadlish>
and msp's are cheap
<oliv3r>
yeah I missed the TI chronos ti-deal
<wingrime>
mdp: I have chronos
<wingrime>
mdp: nice clock
<oliv3r>
back then i wanted to experiment with RF and opentag using the choronos
<mdp>
the stellaris lm4f120 launchpads are nice too
<mdp>
especially if you got them early at 5USD each
<wingrime>
mdp: I saw 0.5$ msp430 on aliexpress
<mdp>
comparable to stm32 which is also great
<mdp>
wingrime: or order some free samples ;)
<mdp>
for hobbyist stuff, I like to just sample everything
<Dreadlish>
in poland cheapest msps are for about 0.30pln
<wingrime>
mdp: stm32 have crap docs
<mdp>
yeah
<Dreadlish>
(ca. 0.09USD)
<oliv3r>
though atm i like my avr's :>)
<wingrime>
mdp: stm32 crap comparead avr msp430
<wingrime>
mdp: stm32 are marketing shit
<Dreadlish>
but they have arm core
<mdp>
good floating point
<Dreadlish>
and higher clock than avrs ;d
<Dreadlish>
also - they have hardware fp, not emulated like avr one ;d
<wingrime>
mdp: stm32 have many-many bugs
<mdp>
right, TI parts are bug-free
<mdp>
:P
<wingrime>
mdp: still better than stm32
<mdp>
I'd agree..but somebody might call me subjective...though those parts are in a different universe than where I work
<wingrime>
mdp: and where?
<Dreadlish>
meh, everything have bugs
<wingrime>
Dreadlish: thay make aggresive marketing, free dev boards, and buggy mcu without good docs and big errata
<Dreadlish>
wingrime: so, maybe you have something better with arm core?
<wingrime>
Dreadlish: maybe atmell
<oliv3r>
i only have experience with avr's, but what I really miss, is a wiki-like datasheet. up to date, clickable with errata's/warnings etc, it's just a bunch of PDF's; hope you have the right one etc
<oliv3r>
Dreadlish: sunxi :p
<Dreadlish>
wingrime: which one.
<wingrime>
Dreadlish: every complay now have Cortex -M mcu
<wingrime>
Dreadlish: TI have too
<Dreadlish>
oliv3r: sorry, i haven't saw bulk a{10,13} to buy ;d
<oliv3r>
Dreadlish: :p sad but true
<Dreadlish>
they are working only with oems unfortunately ;d
<wingrime>
Still wait cortex a in dip)))
<Dreadlish>
you can only dream ;d
<oliv3r>
mdp: dmaengine-am335x-3.7-rc1 your most current dma work in?
<Dreadlish>
it would probably fit in package, but what with pins ;d
<Dreadlish>
smallest arm i've ever seen was with 48 pins
<Dreadlish>
i haven't seen dip48 anywhere ;d
<ssvb>
wingrime: if I ever get sun6i/sun7i hardware, the first thing that I'm going to check is the ar100 openrisc core
<wingrime>
run linux)))
<oliv3r>
ssvb: sun7i doesn't have ar100 i think, only sun6i
<wingrime>
sunxi67 are big dissapointment
<oliv3r>
wingrime: i haven't seen sun7i perform, but i do know I want one :)
<oliv3r>
sun6i i'm don't care for
<wingrime>
oliv3r: it better for sunxi send us free devboards)))
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<oliv3r>
wingrime: ask allwinner :D but i think a20 hasn't been released yet
<oliv3r>
it is delayed by a few weeks
<ssvb>
wingrime: cheap devboards are also fine for me :)
<wingrime>
ssvb: what we can do with aw_clksrc ?
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<ssvb>
wingrime: should we do anything about it? the arm chromebook and omap3 seem to have a comparable performance when doing gettimeofday polling
<oliv3r>
a13 only has 1 pwm channel ;(
<ssvb>
wingrime: on the other hand, intel atom seems to be roughly 10x faster :)
<wingrime>
ssvb: we have advantage no cooling
<ssvb>
wingrime: is being able to do just ~1 million of gettimeofday calls per second too slow for us?
<mdp>
oliv3r: that's for a different part..I don't have anything up there for sunxi yet
<mdp>
oliv3r: lots of stuff up there for different parts
<oliv3r>
mdp: busy man :)
<mdp>
just old stuff
<oliv3r>
*sigh* sun4i manual has one half of the register description, sun5i has a nother quarter :S incomplete datasheets, *sigh*
<wingrime>
ssvb: we can add wait_for_event ))))
<ssvb>
wingrime: cortex-a15 in chromebook is generally significantly faster than intel atom, it's just the gettimeofday where atom for some reason leaps ahead
<ssvb>
wingrime: no, we can't :) we can only speed up this code by reducing the amount of hw register reads
<wingrime>
ssvb: we can low rating \
<wingrime>
so system will use other timer
<ssvb>
wingrime: the loop that you tried to remove only does one or two hw register reads, it is not like it is running many iterations
<wingrime>
mpd: how do you think it better "finite state machine" teory for dma code
<wingrime>
?
<oliv3r>
time to go home :)
<oliv3r>
bb
<ssvb>
wingrime: I will try to check how gettimeofday is implemented on intel atom and why it is so fast, but will need to recompile the kernel to get the symbols for perf
<ssvb>
wingrime: atom is very slow :( and unlike ARM devices, I'm compiling the kernel natively for it
<wingrime>
ssvb: I hope AW make some thing on a15)))
<ssvb>
wingrime: I hope that AW is not going to enforce serious security in their devices
<wingrime>
ssvb: realy, there is a reason?
<ssvb>
wingrime: TI is a PITA, and seems like Samsung is also gradually getting worse with the regards to what is allowed to do with their hardware
<mnemoc>
there are rumours about a "high end" soc from allwinner during this year
<wingrime>
good
<mdp>
mnemoc: the rumored a15 design?
<mnemoc>
i suppose it's the same
<mnemoc>
but obviusly nothing will be confirmed until it's already cooked
<mdp>
right
<jinzo>
With the A20 and A31 delays... I don't think they can ship anything this year
<wingrime>
a10/a13 popular at all
<wingrime>
on cheap hardware
<wingrime>
rk3066 for more expensive
<mdp>
considering how crappy A7s are, it'll be a welcome upgrade on the roadmap
<ssvb>
mnemoc: do you know if anyone has got some A31 device already and compiled his own kernel for it from sources?
<ssvb>
mdp: do you have some hands-on experience with Cortex-A7 cores?
<mdp>
via colleagues
<mnemoc>
ssvb: I think ZaEarl tried
<mdp>
they're intended as a single core bargain basement core or for big.LITTLE implementations
<mdp>
the dual/quad implementations allwinner does are suboptimal compared to the same with A9
<wingrime>
Aw get typical bottle-neck problem 4 cores and slow dram ctrl
<mdp>
they just aren't designed for that
<mdp>
but they can at least advertise "Quad-Core!"
<mdp>
;)
<wingrime>
mpd: thay want do baseband I think
<wingrime>
mpd: with ar100
<mdp>
yeah
<jinzo>
it's china... so yeah, the A10's 1.5Ghz n'stuff :D
<mdp>
I'm ok with it..it's all a price balance
<ssvb>
wingrime: compared to Cortex-A8 and even early Cortex-A9, Cortex-A7 should have a beefed up memory interface (at least TLB is bigger, has automatic hardware prefetcher, etc.)
<mdp>
my only complaint about the roadmap is that the SGX core ended up on the A31 instead of Mali...disappointing
<wingrime>
ssvb: Why thay not enable use whole SRAM for L2
<wingrime>
ssvb: Only single register for it and we get big boost
<ssvb>
wingrime: that's a kind of silly question, because there is no universally fast "SRAM"
<ssvb>
wingrime: L1 cache is "SRAM", and L2 cache is also "SRAM", however L1 cache is significantly faster
<wingrime>
ssvb: I hope
<ssvb>
wingrime: just like "DRAM" performance can also vary a lot depending on implementation
<ssvb>
wingrime: the SRAM built into SoC is nowhere as fast as CPU L1/L2 caches
<wingrime>
ssvb: more speed may be slow in fact (bottle-neck)
<ssvb>
btw, I scrolled back and noticed that you discussed a large SRAM from CEDARX
<ssvb>
have you managed to mmap it and test?
<ssvb>
because it does not seem to work for me
<wingrime>
ssvb: I not sure we have 512 sram for it
<wingrime>
ssvb: we have 512 reserved address-space for it
<ssvb>
I only tried 64KiB of SRAM B(Secure) on Allwinner A10
<mnemoc>
wingrime: hi, I was going to apply now the */3 serie of pm patches, but you replied Re: [linux-sunxi] [PATCH 3.4 3/3] Implement pm suspend. with some comments. was that sorted out here? should I still hold it?
<wingrime>
don't push 3/3
<wingrime>
CpuDoIdle have no normal suspend exit
<mnemoc>
any idea how to solve that properly?
<wingrime>
1/3 2/3 looks good
<wingrime>
mnemoc: we need reconfigure some device as exit source
<wingrime>
mnemoc: witch means we need some thing send IRQ
<wingrime>
mnemoc: also 1/3 simular with mine
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<wingrime>
for example we need enable LRADC and enable his IRQ (exit on volume keys)
<wingrime>
mnemoc: 3/3 not usable in this state
<mnemoc>
ok
<mnemoc>
will you send fixes for the ofending drivers? :)
<wingrime>
mnemoc: it better rewrite it to drop binary
<mnemoc>
can we without breaking android?
<wingrime>
I don't know what android do for suspend , but considering that it was broken we can't make it brokern more than be before
<xenoxaos>
Challenge Accepted
<wingrime>
I hope techn try make android do full suspend
<wingrime>
or trul
<wingrime>
Then we will able test/fix and improve
<mnemoc>
:)
<mnemoc>
wingrime: go go go :)
<wingrime>
mnemoc: I have more priority with usb unification and preformance fixes
<mnemoc>
fair enough ;-)
<wingrime>
mnemoc: also, I hope, we will get docs for nand
<wingrime>
mnemoc: and drop most part of "nand" that representing block device and replace it with mtd
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<mnemoc>
wingrime: nand docs? did I miss something?
<techn__>
wingrime: android suspend worked well with 3.0.52 kernel atleast
<techn__>
now trying to fix that regresion with usb
<wingrime>
mnemoc: we did't have Nand controller documents
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<wingrime>
tenh__: that my fix, it you redo this you broke loadable gadgets
<mnemoc>
wingrime: I know we didn't. I thought you found someone who can get them
<wingrime>
a31 have shared 1Mb L2
<wingrime>
32 sram + 64 secure
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<ZaEarl>
ssvb, I didn't get very far compiling the A31 sources. I have some new A31 sample tablets coming this week, so I'll probably try again on the kernel next week.
<oliv3r>
ZaEarl: are you going to do any A20 tablets?
<ZaEarl>
possibly, haven't seen any production units yet.
<oliv3r>
no inside info either :p
<oliv3r>
i know hipboi said they where delayed by a few weeks
<oliv3r>
possibly a month or two
<oliv3r>
but that is a few weeks ago again :)
<oliv3r>
wingrime: what register do you think we need to set to enable sram access from cedarx; SRAM_CTL0_CFG? change it to 0?
<oliv3r>
argh, i should work out how to use fel mode to test these things :) but i don't wanna break my tablet just yet :)
<oliv3r>
wingrime: dropping nand for mtd may be possible, we have a very basic mtd driver now, and slapin and hno did some early work too. also we have some other code; but i think hno and slapin dispersed :(
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<wingrime>
olive3r: so just change mapping bit to CPU
<wingrime>
olive3r: mtd faster than AW's ?
<mnemoc>
problem with AW's is that they implement everything themselves, partitions, leveling, randomness, ...
<oliv3r>
wingrime: atm, it's about the same I think, not much difference, the nand (controller?) is extremly slow; 5-15 MiB/s
<oliv3r>
even if the mtd driver is horrible, it has to be really bad to be able ot underperform that :)
<Quarx>
still no one got cedar/hmid on android 4.2 a10? i want try get it working.
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<leowt>
is there anything wrong with 8192cu in 3.4?
<oliv3r>
Quarx: nope, but not much work going on either
<oliv3r>
leowt: i haven't had issues with it; though come to think of it, sometimes it resets
<ssvb>
mnemoc: I wonder whether the quality of the allwinner nand code is any different from the quality of average FTL layer on no-name SD cards :)
<leowt>
oliv3r: mine cant scan anything
<mnemoc>
ssvb: :)
<oliv3r>
i wouldn't be supprised that there isn't any FTL layer :p
<oliv3r>
but with mtd, there's other choices of FS : )
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<oliv3r>
leowt: what image are you using?
<leowt>
a compiled one
<oliv3r>
hansg's fedora 18?
<leowt>
oliv3r: debianfs
<xenoxaos>
marsboard looks to be reasonably well built...
<leowt>
any up to date instructions to setup nand's uboot?
<oliv3r>
leowt: if you want to test the driver, your kernel etc; it's probably a good idea to have a 3gb+ SD card with hansg's fedora image, it works really well and i've used many custom builds with custom modules
<oliv3r>
xenoxaos: marsboard still not out is it?
<xenoxaos>
i dunno....
* xenoxaos
has one on my desk though
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<techn__>
ssvb: dunno what is the problem with xbmc but it spends almost 20% of time in that get time function
<techn__>
and biggest problem with that function is that it disables interrupts
<wingrime>
dma driver like bees hive
<ssvb>
techn__: maybe it is heavily polling the clock in a loop to make sure that video and audio are perfectly in sync?
<techn__>
ssvb: even it there is no video? :)
<wingrime>
ssvb: we have avs module for it
<techn__>
ssvb: anyway hasng had idea to use different clocksource for it
<ssvb>
don't know, somebody needs to profile it :)
Dreadlish is now known as Deadfish
<techn__>
clocksource which doesnt need latching
Deadfish is now known as Dreadlish
<wingrime>
techn__ : you tryed comment out wait?
<techn__>
wingrime: yes.. and removed interrupt disable code
<techn__>
didn't notice any bad effect.. but hadn't courage to send patch :p
<ssvb>
it probably disables the interrupts to ensure that the 64-bit counter read is atomic
<ssvb>
because low and high parts are read separately
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<techn__>
ssvb: yes.. touching to that logic causes effects which could happen once in lifetime :p
<wingrime>
techn: i talkin this string while(TMR_REG_CNT64_CTL & (1<<1));
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<techn__>
wingrime: yes.. me too
<wingrime>
and after, xbmc worked good?
<techn__>
wingrime: yes.. it was way more responsive
<techn__>
and cpu time in that function was only 8%
<wingrime>
i hope this is not placebo
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<jorgegeorge>
I have just found a little bug related to gadgetfs and .config, where should I report it (I already have a proposed fix as well)
<mnemoc>
jorgegeorge: the mailing list
<jorgegeorge>
which one? I found many about the A10
<techn__>
but for sun5i there is only HOST_ONLY and NONE.. code assumes also OTG is possile
<jorgegeorge>
About sun5i, is there now some linux boot working for the A10S ?
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<techn__>
hansg was working.. dunno current state
<techn__>
wingrime: what you mean with "fix gadget init after loading as module" ?
<techn__>
which module you load and unload?
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<wingrime>
techn: you can compile "gadgets as modules"
<wingrime>
ether printer muilt
<wingrime>
android can be in kernel only
<techn__>
yes.. they are modules by default
<wingrime>
so you need insmod
<wingrime>
without patch this is not work
<techn__>
it works
<wingrime>
you can insmod /rrmod
<techn__>
android enables them from userspace
<wingrime>
techn__: we talking about "non andorid gadget"
<techn__>
when module is loaded.. everthing is disabled.. after that userspace tells module to enable
<wingrime>
adroid is not only one for a10
<wingrime>
we do "linux-sunxi"
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<wingrime>
try debian with/without patch
<shineworld>
someone know why android (android TV) change display settings after first steps of boot ?
<shineworld>
I've configured rightly a LVDS which work till is in bootanimation and died after that
<shineworld>
*die
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<techn__>
wingrime: non android gadget seems to do enabling during bind.. to get this fixed properly we need to get rid of "WRN:L2675(/home/techn/sunxi-bsp/android/kernel/allwinner/common/drivers/usb/sun5i_usb/udc/sw_udc.c):.." warnings
<techn__>
this allows real logic work freely
<techn__>
and how that is done.. maybe uncommenting line 3668 will help.. most likely it breaks something
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<wingrime>
techn__: add #ifdef for android gadget and send patch
<wingrime>
techn__: It totaly crap
<wingrime>
techn__: if we use android gadget don't do "my patch"
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* Turl
is back
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<mnemoc>
oliv3r: can you check the 2/10 patch of your sound serie? on one side it doesn't apply on any branch, and on another it only deletes.... no machine_is_sunNi() code added anywhere
<Turl>
mripard_: ping
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