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<wpwrak>
nicksydney: i don't think they did the neo900 layout yet. but you'd have to ask DocScrutinizer05 about that
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<DocScrutinizer05>
no layout for Neo900 yet
<DocScrutinizer05>
except the mech ver protos
<DocScrutinizer05>
which I haven't even seen the new ones yet
<DocScrutinizer05>
those took not too long
<DocScrutinizer05>
I think Nikolaus said "one day"
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<nicksydney>
DocScrutinizer05: how long you reckon the proto version took to lay out the board and route ? was wondering how long a project as complex as neo will take to lay and route
<DocScrutinizer05>
depends on a few critical details
<DocScrutinizer05>
layout+routing isn't that hard. The details that need to fit mechanically are the real headache
<nicksydney>
DocScrutinizer05: 2-3 days by hand or mix auto routing ?
<DocScrutinizer05>
we do autorouting mostly
<DocScrutinizer05>
would be insane to route such stuff manually
<DocScrutinizer05>
creating footprints however takes much time
<DocScrutinizer05>
e.g. for the socket for the camera module
<wpwrak>
making footprints is kinda fun with fped ;-)
<wpwrak>
the hard bit it sometimes to "crack the code" of some drawings, especially complex mechanical parts (e.g., microsd card holders)
<wpwrak>
but fped makes it really easy to actually "implement" a design. parametric cad is very useful for such things.
<nicksydney>
wpwrak: when i get the chance will try to create a video for fped :)
<DocScrutinizer05>
well, I'd think eagle has parametric cad too
<DocScrutinizer05>
still creating the footprint e.g. for the modem takes half a day easily
<DocScrutinizer05>
after all you need to label each single of the 144 pads
<nicksydney>
DocScrutinizer05: doesn't the vendor (TI in neo900 case) provide footprint ?
<wpwrak>
label ... in the footprint ?
<DocScrutinizer05>
huh? the modem is made by Siemens
<wpwrak>
don't they have systematic numbers ?
<DocScrutinizer05>
o.O
<DocScrutinizer05>
like... the systematic numbers on a CPU?
<wpwrak>
i mean the pads. or do you mean schematics symbols instead of footprints ?
<DocScrutinizer05>
a pin number is different thing than the pin label
<wpwrak>
yes. but the layout shouldn't have labels
<wpwrak>
i mean the footprint
<wpwrak>
e.g., a 32-qfn footprint shouldn't care whether pin 5 is "USB_DP", "P0_2", "A17", "nRESET", or whatever the 2^\infty chips of that size may have on that pin
<DocScrutinizer05>
what worth is a footprint that's unconnected to the schemitics?
<wpwrak>
the schematics symbol should make that connection
<DocScrutinizer05>
*sigh*
<DocScrutinizer05>
CAD using component libraries
<DocScrutinizer05>
EDA rather
<wpwrak>
so you clone your 32-QFN for all the chips that have a 32-QFN package ?
<DocScrutinizer05>
meh, need more coffee
<wpwrak>
and if you want to edit something, you edit all the clones ? ;-)
<wpwrak>
looks pretty much like the same sort of structure
<DocScrutinizer05>
and in eagle, a component consists of footprint plus schematics symbol since both is tightly linked
<wpwrak>
footprint would have P4, P5, ...
<DocScrutinizer05>
know what? I have better things to do than to discuss linguistics with you
<wpwrak>
symbol USB_DP -> P5, USB_DN -> P5, ...
<wpwrak>
of course, in this case you probably don't have much reuse of the footprint. but for any more common packages there's no point in having signal names at the level of the footprint
<wpwrak>
;-)
<DocScrutinizer05>
juts s/footprint/component library entry/g for my last 50 posts
<DocScrutinizer05>
l8rs
<wpwrak>
aah ;-) okay. then we're in agreement :)
<DocScrutinizer05>
and for Eagle, you even want to define properties for each signal, like input|output|voltage|whatnot
<DocScrutinizer05>
for DRC
<DocScrutinizer05>
err ERC
<wpwrak>
ah, good. kicad is a bit primitive there.
<wpwrak>
it has input/output/etc. but not voltages or such
<DocScrutinizer05>
anyway you do all this for each pad of the footprint(sic!) while you draw it, basically. The schem symbol is drawing a rectangle then, and a bit of lable pushing to the right and left side
<DocScrutinizer05>
done in 10 minutes
<DocScrutinizer05>
label pushing
<DocScrutinizer05>
mech eval boards were made 50% for proving the modem footprint
<DocScrutinizer05>
and yes, again footprint since it's the footprint that assigns a signal to a pad
<DocScrutinizer05>
and Nik missed that one of the status signal outputs is OpenCollector and connected it to basis of an LED driver transistor
<DocScrutinizer05>
which reminds me to short that transistor C-B
<DocScrutinizer05>
fun, my first rework on Neo900
<wpwrak>
(footprint) hmm, so is there then another layer for the geometry ? or do you have countless clones of, say, 0603 ?
<DocScrutinizer05>
yes, I think they are countless clones
<DocScrutinizer05>
like in every CAD
<wpwrak>
urgh
<DocScrutinizer05>
I never really bothered. When I need to do a mass edit of a e.g. standard 0603 footprint, I guess I find a sort of global find&replace command
<wpwrak>
heh. yes, that's what you need then. with a filter of what exactly you want changed. elegant ;-)
<DocScrutinizer05>
but maybe there's even an abstraction layer in between
<DocScrutinizer05>
dunno
<wpwrak>
that would help
<DocScrutinizer05>
anyway I never want to change all 0603
<DocScrutinizer05>
I maybe want to change the 0603 footprint geometry for one component series
<wpwrak>
think of things like pcb making improving and you want a thinner line on the silk screen. that would be a "safe" change to apply everywhere
<DocScrutinizer05>
I mean, how sane would it be to have same footprint geometry template/macro for 0603R and 0603 LED?
<wpwrak>
generally works for me :)
<wpwrak>
well, we have 0603 and 0603P - the latter is polarized
<DocScrutinizer05>
yeah, since you don't know about stuff like "no traces area" under the component, in kicad
<wpwrak>
of course, if you want a little LED symbol in silk screen or such, then you need a specific footprint
<wpwrak>
yeah, keepout areas in footprints could be useful indeed
<wpwrak>
could be that this already exists in the depths of the new layout format. there's a glacially slow transition of file formats in kicad from the old "simple" formats to more extensible ones, along with a bunch of new features
<wpwrak>
alas, the transition is so sluggish that it would be a pain to try to keep up. so i'm just waiting until some major blocks are finished before digging into making use of them
<wpwrak>
fped has a somewhat more abstract view anyway. you basically define geometries and then it combines things into the "objects" kicad uses. e.g., pad + hole = plated through-hole (unless you specifically ask for something else)
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<DocScrutinizer05>
yeah, I think similar multilevel macros are available in eagle too
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<DocScrutinizer05>
maybe worth checking out the free trial version of eagle, just to have a peep into neighbor's garden?
<wpwrak>
looks pretty similar to what we have in kicad. have you ever used it ?
<viric>
Eagle is the only pcb software I used in linux
<wpwrak>
non-Free is bad for your karma :)
<viric>
I only used tango in dos, and eagle in linux, in fact. All, more than 15 years ago. The demo version was bound to a board size, which was enough for my needs.
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<viric>
wpwrak: I met a grandgrandaughter of Yrigoyen, last november.
<viric>
it feels like something important. :)
<wpwrak>
;-))
<wpwrak>
i live on a street named after him :) (i could almost say "avenue", but it changes type a few meters from my place)
<viric>
she was lied by her family, that she was such an important person
<viric>
she discovered that only after the dead of her parents, by finding impossible information in her family archives.
<viric>
(like her grandmother giving birth to his father at 65)
<wpwrak>
heh ;-)
<viric>
she contracted a professional genealogy research, and they found the real path
<wpwrak>
but what did they lie about ? so they didn't tell her she was a descentant of yrigoyen ? why hide that ?
<viric>
it seems they were very ashamed of having bounds with Yrigoyen
<viric>
by her description, she felt like the 'black sheep' in a fascistoid family
<wpwrak>
odd. he seems to have been a pretty decent president.
<viric>
I guess there was diversity of opinions about that :)
<wpwrak>
and not exactly a fascist either ...
<viric>
sure, hence the hidding
<viric>
The fascistoid were her parents, not Yrigoyen
<wpwrak>
ah, i see
<wpwrak>
yes, the fascist may rightfully have considered him a sub-par president :)
<viric>
on Saturday I released a new 'filegive' btw. Better and better.
<wpwrak>
it's time to make a "fileget" that uses the NSA infrastructure to also acquire files you're not supposed to be able to get :)
<viric>
:)
<viric>
In fact I dislike all about 'security'. I find it very very boring.
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<DocScrutinizer05>
WTF Yrigoyen
<wpwrak>
a former president of argentina, Hipolito Yrigoyen. i live on a street that's named after him.
<DocScrutinizer05>
and, any special reason to mention that today?
<DocScrutinizer05>
I mean, I probably don't live in a street named after Saint Kanal, but if it was I'd wonder why to talk about it
<DocScrutinizer05>
did you publish your adress recently?
* DocScrutinizer05
suspects that viric noticed the name of street where wpwrak lives, but then why would wpwrak state again that he does.
<wpwrak>
viric met a descendent of yrigoyen and was impressed by that. not sure if he knew that i live on that street.
<DocScrutinizer05>
hmm, the waitress in "my" cafe a few years back been the daughter of our ministry of wealth
<DocScrutinizer05>
errr health
<DocScrutinizer05>
it actually eventually felt a bit strange, when the mother drove on backseat of those bulletproof sedans and the daughter worked in a (hippie) cafe
<wpwrak>
nice ;-)
<wpwrak>
and would be even nicer if she had been the daughter of a "minister of wealth" :)
<DocScrutinizer05>
hehe
<viric>
I had no idea about the street
<DocScrutinizer05>
seems in my case mother and daughter also were not too fond about each other ;-). I'm pretty sure about the daughter
<DocScrutinizer05>
well, at least she didn't like to talk about her mother
<DocScrutinizer05>
probably different political party
<DocScrutinizer05>
;-P
<DocScrutinizer05>
I don't think her mother lied to her though, about her own job and political prefrences
<DocScrutinizer05>
so no minister of wealth/health, only "Vizepräsidentin des Deutschen Bundestages" and vice chief of SPD fraction of Deutscher Bundestag
<nicksydney>
whitequark: which part you think is not impressive ? is it the speed of MCU ?
<whitequark>
boards based on Allwinner have much nicer specs with comparable price
<larsc>
the bang for your buck
<larsc>
(is not that impressive)
<whitequark>
A10 boards are usually 2x or so more expensive, but when you add the WiFi module, the difference shrinks considerably
<wpwrak>
allwinner may be harder to source and to get docs. do they publish them now ?
<whitequark>
and A10 boards almost always have ethernet, wifi, hdmi, and all other goodies
<whitequark>
wpwrak: (harder to source) based on the amount of projects using their chips, appears that it's easy
<whitequark>
(docs) rz2k would know firsthand
<whitequark>
!seen rz2k
<qi-bot>
whitequark, rz2k (~rz2k@188.244.38.171) was last seen quitting #qi-hardware 1 day 1 hour 25 minutes ago (19.01. 20:30) stating "" after spending 4 hours 2 minutes there.
<whitequark>
he works with Allwinner boards and is quite pleased with them afaik.
<wpwrak>
the atmel is available from digi-key. that's a big advantage. wish they had more of the "deep asia" products.
<nicksydney>
whitequark: (AllWinner) no they don't publish the docs .. even for their current Octa Core they don't .... but Tom Cubie might have access to it as he is planning a board for it
<wpwrak>
whitequark: if you take the aliexpress route you have to verify the vendor and maybe their supply chain. or else you may some day get a box of fake parts. no fun.
<whitequark>
you can even get them in LQFP!
<wpwrak>
"2 Pravda St." -- US ? ;-)
<wpwrak>
they're in bulgaria
<whitequark>
eh?
<wpwrak>
you should be able to recognize your former comrades ;-)
<whitequark>
oh, I always thought Olimex was an US company. either way
<whitequark>
they're not the ones to screw you over
<wpwrak>
no, they're definitely good guys
<wpwrak>
didn't know they're now selling chips. that's nice.
<wpwrak>
alas, no data sheets there either
<nicksydney>
whitequark: rockchip is coming to the surface fast and furious too .. competing head to head with AllWinner
<wpwrak>
nicksydney: no, i use the file-based flasher of the frdm-kl25z board
<nicksydney>
lost there..so how is the pin configuration between anelok and the kl25z board ?
<wpwrak>
the board contains a programmer circuit. that circuit can either program the chip on the board or one you connect on the outside.
<wpwrak>
i use that programmer circuit. the SWD is some jtag variant and therefore a bit complex, and support for it in openocd and such doesn't seem to be very smooth just yet.
<wpwrak>
so i took the approach that would get me results in the fastest way. eventually i'll want to get rid of the board. but there's no rush.
<wpwrak>
also, i can make a dfu boot loader for the kl25, which would eliminate the board for anything but the boot loader updates (which should be very rare, typically only once in the life of a board)
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<nicksydney>
can you tell me what to connect where in terms of interface the kl25 with anelok ?
<nicksydney>
want to try it once i'm able to get the KL QFN chip
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<wpwrak>
SWD_DIO, SWD_CLK, nRESET, VDD, GND. that's all you need.