<yuriks>
does anyone have any example of top-level files for nmigen? I'm trying to figure out how to hook stuff up to output pins and the only example I know of is blinky in nmigen_boards
<yuriks>
is there any way of getting a one-off pin without defining it in the platform?
<zignig>
not sure, in what context ?
<zignig>
I think defining it in the platform is a good idea, layer of abstraction.
<yuriks>
I'm using a devboard plat definition that just has connectors with a lot of misc pins. I'm prototyping something and want to hook some stuff into some of those
<yuriks>
the connectors are just labelled with the actual FPGA pin names, so indexing by connector pin number is counter-productive
<zignig>
ah ok, in the example I gave you it actually makes individual pins and the concatenates them into an array.
<zignig>
so they can be controlled from the processor.
<zignig>
sig = platform.request('your_pin',1)
<zignig>
will hand you back a signal,
<zignig>
then
<zignig>
m.d.sync += sig.eq(<driving code>)
<zignig>
it does make it a bit convoluted , but portable.
<yuriks>
how is PinsN supposed to work? I was trying to use it for some active-low signals and it just doesn't seem to work
<yuriks>
replacing it with Pins and then just flipping the value in my code manually works fine
<mtrbot-ml>
[mattermost] <sb10q> please post your code and what the error message was
<yuriks>
I'm cleaning up my code now, will post in a bit. Only error message is "my device doesn't work when I use it"
<mtrbot-ml>
[mattermost] <sb10q> can you try with something trivial e.g. a pushbutton controlling a LED? then it should be obvious what PinsN does (or not)
<mtrbot-ml>
[mattermost] <sb10q> if you are indeed using it correctly, the other thing I can think of is timing; PinsN inserts an additional LUT and therefore increases delay (which IMO is objectionable as I mentioned to whitequark)
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<mtrbot-ml>
[mattermost] <sb10q> @rjo is the server still slow? do you have more information?
<rjo[m]>
much better now. thanks for tweaking it. now the bottleneck seems to be getting to the first byte of a HTTP response. Fluctuates from 2-4 seconds. Measured in chrome and on the command line. Independent of v4 versus v6 and 10G DFN versus a random COLT commercial link. 2 seconds might be ok as that's about 4 RTT, i.e. 4 RTT for TCP and TLS init.
<mtrbot-ml>
[mattermost] <sb10q> is that from the quartiq connection?
<mtrbot-ml>
[mattermost] <sb10q> i.e. if I log into the quartiq computer can I reproduce the issue?
<mtrbot-ml>
[mattermost] <sb10q> 2-4 seconds still sounds like a lot
<mtrbot-ml>
[mattermost] <sb10q> should I try to enable HTTP/2 Server Push?
<mtrbot-ml>
[mattermost] <sb10q> that seems simple enough to do...
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<rjo[m]>
here at quartiq it's a bit longer with 300-600 ms RTT. from HU or PTB (both DFN) it's in the lower 300ms range.
<rjo[m]>
i guess this is very much about optimizing for long RTT.
<rjo[m]>
any news on Sayma/Metlino, anybody? IIRC the boards should have been done a least a couple weeks ago if not earlier and stuffing should be done.
<mtrbot-ml>
[mattermost] <sb10q> yes, sayma should be ready anytime now
<rjo[m]>
I talked to the Innsbruck people a couple times and they seemed increasingly interested in not only buying Sayma (and Sinara/ARTIQ) but also becoming involved. May or may not happen though. They wanted to talk to Joe or anybody whoever shows up at their next IARPA review meeting. Pointed them at Oxford as well.
<rjo[m]>
sb10q: another note: IME the 1-2$ ST-LINK clones on aliexpress.com work fine for SWD. that might be faster than trying to organize this remotely or shipping things.
<mtrbot-ml>
[mattermost] <hartytp> @rjo cool. Happy to talk to them (although, would be better if we had Sayma first...)
<mtrbot-ml>
[mattermost] <hartytp> Greg said Sayma should be with CTI any day now. Hopefully they get through their testing relatively quickly and without issues
<mtrbot-ml>
[mattermost] <hartytp> One other thing I didn't know until chatting with Greg at NACTI is that TS have solder over 1k Sinara boards. Not bad
<mtrbot-ml>
[mattermost] <hartytp> CTI business people are still unconvinced about whether they really want to get into Quantum HW, hopefully we can convince them to make it more of a priority as time goes on
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<rjo[m]>
>1k would have been my estimate as well. QUARTIQ alone has assembled ~40 systems each with about 10 cards average. M-labs similar
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