sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
<cr1901_modern> >the point*s* at where it should insert latche*s*, if it turns out there is a loop
<cr1901_modern> Grammar fail on my end; one latch per loop, right?
<whitequark> dunno
<whitequark> i'm not interested in latches at all
<whitequark> the extent to which i understand the latch semantics in rtlil is the extent to which i need to go to avoid them
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<_whitenotifier-3> [nmigen] sbourdeauducq commented on pull request #40: WIP: Expand and document lib.cdc - https://git.io/fjXIT
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<sb0> whitequark: "sys" just comes from the convention that many verilog/vhdl cores use sys_clk as signal name
<sb0> but I don't insist on it
<whitequark> ahh, that's where
<whitequark> it came from
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<mtrbot-ml> [mattermost] <harryho> harryho joined the team.
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