sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
<cr1901_modern> cmd /c "call C:\Xilinx\14.7\ISE_DS\settings32.bat && xst" <-- this also works (duh)
<cr1901_modern> Anyways, looks like "/k" isn't required at all. The way omigen did it was to do the call to the source script inside the batch file. And this appears to be equivalent to invok
<cr1901_modern> ing each command in order using cmd /c (also duh I guess, but I never got it to work before now)
<cr1901_modern> I'll write the issue now.
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±2] https://git.io/fjitq
<_whitenotifier-3> [m-labs/nmigen] whitequark ba64eb2 - build.run: make BuildProducts abstract, add LocalBuildProducts.
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555149042?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Failure. 80.73% (-0.02%) compared to 1ee21d2 - https://codecov.io/gh/m-labs/nmigen/commit/ba64eb2037ded45238f8228a30ecea1c6c9fc5f8
<_whitenotifier-3> [nmigen] Failure. 43.47% of diff hit (target 80.74%) - https://codecov.io/gh/m-labs/nmigen/commit/ba64eb2037ded45238f8228a30ecea1c6c9fc5f8
<cr1901_modern> whitequark: It probably should be TOOLCHAIN_SOURCE and TOOLCHAIN_CALL, b/c we generate both .sh and .bat files unconditionally in nmigen, and they should be different
<cr1901_modern> these _incidentally_ can also serve as the variable that sets up paramiko builds whenever that functionality is added
<cr1901_modern> s/paramiko/remote/
<whitequark> huh?
<whitequark> how is that related to remote builds?
<cr1901_modern> You'll most likely need some initial setup script when doing remote builds
<whitequark> to do what?
<cr1901_modern> to get the paths ready, unless you already source ise/vivado settings in your .bashrc
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjitG
<_whitenotifier-3> [m-labs/nmigen] whitequark 744154e - build.run: only use os.path on the target OS.
<whitequark> yeah, but there's no difference between local and remote builds here
<cr1901_modern> I'm saying reuse the var. Just my two cents
<cr1901_modern> s/Just my two cents//
<whitequark> what do you mean by reuse? remote builds work by extracting the build plan on the remote system and then running the same script
<cr1901_modern> Oh, nevermind then
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555149919?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Failure. 80.72% (-0.02%) compared to ba64eb2 - https://codecov.io/gh/m-labs/nmigen/commit/744154ebb551f3af613d0aed53e0ca4cf17b3659
<_whitenotifier-3> [nmigen] Failure. 0% of diff hit (target 80.73%) - https://codecov.io/gh/m-labs/nmigen/commit/744154ebb551f3af613d0aed53e0ca4cf17b3659
<_whitenotifier-3> [nmigen] cr1901 opened issue #131: `TOOLCHAIN_ENV` user variable - https://git.io/fjitn
<cr1901_modern> I think I'm taking a break for now... kinda fried lol
<whitequark> hm, I was going to implement it and ask you to test
<_whitenotifier-3> [nmigen] whitequark opened issue #132: Allow dependent platform attributes - https://git.io/fjitc
<cr1901_modern> alright, I'll stick around longer
<cr1901_modern> I'm just discouraged that I ran into a bunch of snags getting things to work today on my end.
<whitequark> yeah, that happens...
<_whitenotifier-3> [nmigen] whitequark commented on issue #131: `TOOLCHAIN_ENV` user variable - https://git.io/fjit8
<cr1901_modern> mercury is only ready to the extent I implemented the bare minimum to hook it into xilinx_spartan6.py. Once you implement TOOLCHAIN_ENV, I could probably make a PR for S3 support in nmigen tonight and things would be okay.
<cr1901_modern> But I think I want to hold off until mercury is fully implemented and tested.
<whitequark> mercury?
<cr1901_modern> the Spartan3A platform I want to add
<whitequark> cr1901_modern: ok, so, I think this should work: https://paste.debian.net/1090535/
<whitequark> can you check if it does?
<cr1901_modern> yes, will do now. Gimme a sec to patch
<whitequark> also, good catch on it being per-platform... should be NMIGEN_ise_env, NMIGEN_vivado_env, etc
<cr1901_modern> I'm testing the patch as-is right now
<cr1901_modern> it'll be fine I think
<whitequark> it's more useful if you have both ISE and Vivado
<whitequark> and want to put it all in your bashrc
<cr1901_modern> My case would be diamond and ise on one machine and diamond and vivado on another
<cr1901_modern> and well it'll equally apply to quartus if someone is an altera/intel fan
<cr1901_modern> and eventually adds that
<whitequark> exactly, so you need both NMIGEN_Diamond_env and NMIGEN_Vivado_env
<whitequark> and NMIGEN_Trellis_env and so on
<cr1901_modern> trellis and icestorm indeed live on my system path :P
<_whitenotifier-3> [nmigen] cr1901 commented on issue #131: `TOOLCHAIN_ENV` user variable - https://git.io/fjit2
<cr1901_modern> whitequark: toolchain was found with your patch
<mtrbot-ml> [mattermost] <sb10q> @hartytp one thing that worries me a little about the si549 and similar chips is possible timing jitter or non-determinism between the i2c adpll write and the actual frequency change. It is a complex chip with probably a MCU inside to process the i2c commands. This isn't present with the original WR that uses a simple DAC to tune a VCXO. But maybe this jitter is very small and/or <message clipped>
<whitequark> excellent
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±5] https://git.io/fjitV
<_whitenotifier-3> [m-labs/nmigen] whitequark 1fcd495 - build.plat: source a script with toolchain environment.
<_whitenotifier-3> [nmigen] whitequark closed issue #131: `TOOLCHAIN_ENV` user variable - https://git.io/fjitn
<whitequark> cr1901_modern: done. the variable is now called NMIGEN_ISE_env
<cr1901_modern> ack
<whitequark> er
<cr1901_modern> ise*
<whitequark> no, ISE
<whitequark> the documentation says exactly how it's spelled
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±5] https://git.io/fjitw
<cr1901_modern> ahhh it _is_ caps
<_whitenotifier-3> [m-labs/nmigen] whitequark 146f3cb - build.plat: source a script with toolchain environment.
* cr1901_modern nods
<whitequark> well, now it says that, there was a typo
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555153584?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.72% (+<.01%) compared to 744154e - https://codecov.io/gh/m-labs/nmigen/commit/1fcd495b0aed86a8707511d559d0371c931c054d
<_whitenotifier-3> [nmigen] Success. 100% of diff hit (target 80.72%) - https://codecov.io/gh/m-labs/nmigen/commit/1fcd495b0aed86a8707511d559d0371c931c054d
<cr1901_modern> Beautiful, this'll work just fine.
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555153752?utm_source=github_status&utm_medium=notification
<mtrbot-ml> [mattermost] <sb10q> And there is jitter anyway in the ddmtd measurement completion times, so the pll has to be tolerant of that
<cr1901_modern> whitequark: Okay stumbled across a fun bug... I copied mercury.py platform from icebreaker.py just to get started, right? >>
<_whitenotifier-3> [nmigen] mithro opened issue #133: Possible wording fix for error message when an "If" is accidently directly under an FSM. - https://git.io/fjitX
<cr1901_modern> s/bug/oversight/
<cr1901_modern> actually wait, that might not be relevant
<_whitenotifier-3> [nmigen] mithro opened issue #134: Add FSM state name annotations to generated Verilog output - https://git.io/fjitH
<_whitenotifier-3> [nmigen] whitequark commented on issue #134: Add FSM state name annotations to generated Verilog output - https://git.io/fjitd
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 3 commits to master [+0/-0/±6] https://git.io/fjitF
<_whitenotifier-3> [m-labs/nmigen] whitequark 3388b5b - hdl.dsl: gracefully handle FSM with no states.
<_whitenotifier-3> [m-labs/nmigen] whitequark cb8be4a - hdl.dsl: clarify error message for incorrect nesting.
<_whitenotifier-3> [m-labs/nmigen] whitequark da1f58b - hdl.dsl: further clarify error message for incorrect nesting.
<_whitenotifier-3> [nmigen] whitequark closed issue #133: Possible wording fix for error message when an "If" is accidently directly under an FSM. - https://git.io/fjitX
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555156716?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.74% (+0.02%) compared to 1fcd495 - https://codecov.io/gh/m-labs/nmigen/commit/da1f58b7aef99912b32b65fe32cd72b61fd5dc34
<_whitenotifier-3> [nmigen] Success. 100% of diff hit (target 80.72%) - https://codecov.io/gh/m-labs/nmigen/commit/da1f58b7aef99912b32b65fe32cd72b61fd5dc34
<_whitenotifier-3> [nmigen] mithro opened issue #135: Support setting FSM encoding attribute - https://git.io/fjitx
<cr1901_modern> whitequark: Anyways I ended up in a weird scenario where half my files were from icestorm and the other half were from ISE. I can no longer duplicate this fiasco, though I saved the build dir for later
<cr1901_modern> It was pretty amusing
<_whitenotifier-3> [nmigen] mithro commented on issue #132: Allow dependent platform attributes - https://git.io/fjiqf
<_whitenotifier-3> [nmigen] whitequark commented on issue #135: Support setting FSM encoding attribute - https://git.io/fjiqU
<_whitenotifier-3> [nmigen] whitequark commented on issue #132: Allow dependent platform attributes - https://git.io/fjiqq
<cr1901_modern> aaand blinky works :'D
<cr1901_modern> on mercury
<whitequark> sweet
<cr1901_modern> _Now_ I can retire satisfied for the night lol. Thanks for the help fixing the snags.
<whitequark> o/
<_whitenotifier-3> [nmigen] mithro commented on issue #133: Possible wording fix for error message when an "If" is accidently directly under an FSM. - https://git.io/fjiqs
<mithro> whitequark: Trying my first nmigen code right now...
<whitequark> mithro: excellent. always a good way to determine usability issues before everyone learns to work around them
<whitequark> I'm wondering if maybe nmigen should encode FSMs itself
<mithro> whitequark: Maybe...
<mithro> whitequark: Vivado seems to use One-Hot State Encoding, Gray State Encoding, Johnson State Encoding and Sequential State Encoding....
<_whitenotifier-3> [nmigen] mithro commented on issue #135: Support setting FSM encoding attribute - https://git.io/fjiqE
<whitequark> there is also the problem that e.g. Yosys doesn't want to recognize FSMs if it can detect a reset
<mithro> whitequark: What parts of Yosys are you actually using? Just the RTIL and write_verilog ?
<whitequark> mithro: also a few proc and memory passes
<whitequark> proc_{init,arst,dff,clean} memory_collect
<whitequark> pretty much all required to actually get the verilog output
<mithro> whitequark: But Yosys RTIL doesn't let you hang attributes or comments of things like the case statements?
<whitequark> mithro: indeed
<whitequark> hm, I'm wondering how parallel_case works
<whitequark> ah I see, full_case and parallel_case lower to different cells before RTLIL
<whitequark> I... think?
<whitequark> mithro: I'm a bit wrong
<whitequark> you can hang an attribute off the *case statement*
<whitequark> but not each *individual case*
<mithro> So... the LRM says "An attribute can appear as a prefix to a declaration, module items, statements, or port connections."
<whitequark> the Verilog LRM is irrelevant here
<whitequark> since I'm not emitting Verilog
<mithro> whitequark: Sure, but if Yosys is able to parse an attribute on a statement?
<whitequark> mithro: parse and ignore, yes
<whitequark> mithro: again: I am not emitting Verilog, so *parsing* Verilog is irrelevant here
<mithro> whitequark: We /were/ working on attribute support but that make clifford unhappy
<whitequark> Yosys can only emit attributes on switch cases if there is an attribute dictionary attached to each switch case
<whitequark> and there isn't
<mithro> whitequark: IE round tripping Verilog too
<whitequark> similarly, there is no attribute dictionary on assignments inside cases (which are just a pair of SigSpec internally)
<whitequark> so there would need to be an attribute dictionary on each case. I'll talk to Clifford about this.
<whitequark> and then there would need to be another Yosys patch that allows emitting comments from the comment attribute
<mithro> whitequark: All seems reasonable to me - but I haven't had a good track record of understanding what Clifford thinks is reasonable
<_whitenotifier-3> [nmigen] sbourdeauducq opened issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqr
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqK
<_whitenotifier-3> [nmigen] sbourdeauducq commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiq6
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiq1
<_whitenotifier-3> [nmigen] sbourdeauducq commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqD
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqy
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiq9
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqH
<_whitenotifier-3> [nmigen] sbourdeauducq commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqQ
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiq5
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjiqb
<_whitenotifier-3> [m-labs/nmigen] whitequark cb02a45 - vendor.lattice_ecp5: don't leave LUT inputs disconnected.
<_whitenotifier-3> [nmigen] whitequark closed issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqr
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555168611?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to da1f58b - https://codecov.io/gh/m-labs/nmigen/commit/cb02a452e9c8be1c3eb52831c9143f69d79d0e97
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing da1f58b...cb02a45 - https://codecov.io/gh/m-labs/nmigen/commit/cb02a452e9c8be1c3eb52831c9143f69d79d0e97
<cr1901_modern> whitequark: After _all_ that, looks like me adding mercury was for naught lmfao
<cr1901_modern> Artix 7 w/ 5v tolerant pins
<cr1901_modern> I still plan to add it b/c I don't plan on getting the new board right now. And well, it was a productive day for nmigen I think lol
<whitequark> there is Artix with natively 5V tolerant pins?
<whitequark> ohhhhh
<whitequark> that's
<whitequark> wow that's clever
<_whitenotifier-3> [nmigen] sbourdeauducq commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjiqp
<_whitenotifier-3> [nmigen] whitequark commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjime
<whitequark> cr1901_modern: it's using this level shifter: https://www.ti.com/lit/ds/symlink/sn74cb3t16210.pdf
<whitequark> based on pass transistors
<whitequark> I've seen the same approach used for I2C, but never one that is 20 bit wide
<_whitenotifier-3> [nmigen] sbourdeauducq commented on issue #136: nextpnr crash: "terminate called after throwing an instance of 'std::out_of_range'" - https://git.io/fjimf
<_whitenotifier-3> [nmigen] whitequark opened issue #137: Versioneer breaks on git-archive (e.g. GitHub zip) downloads - https://git.io/fjimJ
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<_whitenotifier-3> [nmigen] whitequark reopened issue #108: Simulations for code that uses Platform - https://git.io/fjrOG
<_whitenotifier-3> [nmigen] whitequark commented on issue #108: Simulations for code that uses Platform - https://git.io/fjiYk
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<mtrbot-ml> [mattermost] <hartytp> You think an MCU rather than just a bit of logic to handle the I2C interface etc?
<mtrbot-ml> [mattermost] <hartytp> Anyway, my guess is that any timing indeterminism there will be small and so have a negligible impact on the overall phase jitter (the frequency steps are typically tiny once the loop is locked)
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<mtrbot-ml> [mattermost] <hartytp> That intuition is backed up by Weida's measurements of the closed-loop phase noise, which show very good results and don't hint at any noise above the DDMTD noise floor.
<mtrbot-ml> [mattermost] <hartytp>
<mtrbot-ml> [mattermost] <hartytp> If you want a better answer than that, ask Weida, as he's thought about this more and done a lot of modelling
<_whitenotifier-3> [nmigen] cr1901 commented on issue #108: Simulations for code that uses Platform - https://git.io/fji3r
<mtrbot-ml> [mattermost] <hartytp> @sb10q what's the mux for here? https://github.com/m-labs/artiq/commit/dceb5ae501a538fabefc4c30a7b16d74a21bd0e2 In Sinara/ARTIQ both DCXOs have their own dedicated I2C bus (Weida's muxes were just a hack to get things going quickly on the KC705)
<_whitenotifier-3> [nmigen] whitequark commented on issue #108: Simulations for code that uses Platform - https://git.io/fji3P
<_whitenotifier-3> [nmigen] cr1901 commented on issue #108: Simulations for code that uses Platform - https://git.io/fji3D
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<cr1901_modern> whitequark: TLDR to my follow-up; the way I started coding it, I don't see why "that's kinda different".
<cr1901_modern> Getorix: Looked through the public logs, and I couldn't find the relevant messages in the time frame I know I brought it up. I'll check my personal logs later.
<cr1901_modern> But again, all solutions _I_ have for decoupling platform basically use Elaboratable.__init__ creatively (Mixin? Subclass? The general consensus seems to be to use Mixins) to set up some boilerplate methods that is either is invoked initially in elaborate()
<Getorix> Basically when you agree on general design and syntax of decoupling platform and sym, I just would like to see simple blink example modified accordingly :)
<cr1901_modern> sure
<cr1901_modern> Makes my life easier if I don't have to do it ;).
<Getorix> I have done this decoupling in a silly way by detecting simplatform in elaborate, cause it is not available in __init_
<mtrbot-ml> [mattermost] <sb10q> @hartytp the gateware is only capable of programming ADPLL. for all other Si549 programming and for diagnostics, the idea is to use bitbanging I2C from the main/comms ARTIQ CPU
<mtrbot-ml> [mattermost] <sb10q> so this needs a mux between gateware control and GPIO
<mtrbot-ml> [mattermost] <sb10q> @hartytp also it seems to me that the throughput of the whole thing is rather low (limited by ~50 bits at 1MHz on the I2C bus for each sample) so we probably can use only one multiplier for the DSP part
<mtrbot-ml> [mattermost] <sb10q> e.g. make some kind of VLIW processor and compute a semi-optimal instruction sequence
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<_whitenotifier-3> [nmigen-boards] cr1901 opened issue #17: Factor out Seven Segment Display Resources - https://git.io/fjiGs
<mtrbot-ml> [mattermost] <hartytp> ADPLL?
<mtrbot-ml> [mattermost] <sb10q> ADPLL_DELTA_M register
<mtrbot-ml> [mattermost] <sb10q> that's the only one used by the PLL itself, no?
<mtrbot-ml> [mattermost] <hartytp> Aah right yes I believe so
<mtrbot-ml> [mattermost] <hartytp> Yes one multiplier for the dsp sounds good
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<_whitenotifier-3> [nmigen-boards] cr1901 opened issue #18: Handle edge case where the same `Subsignal` uses multiple `Connectors` - https://git.io/fjiGK
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<_whitenotifier-3> [nmigen-boards] mithro commented on issue #17: Factor out resource "sevenseg". - https://git.io/fjiZd
<_whitenotifier-3> [nmigen-boards] cr1901 commented on issue #17: Factor out resource "sevenseg". - https://git.io/fjiZA
<_whitenotifier-3> [nmigen] mithro commented on issue #108: Simulations for code that uses Platform - https://git.io/fjiZh
<cr1901_modern> whitequark: Minimal changes required to get my mercury demo working with nmigen.build: https://github.com/cr1901/crispy-succotash/commit/1a4961ba34c2f446eb159d92a7552e12fe03d73c
<cr1901_modern> https://github.com/cr1901/crispy-succotash/commit/1a4961ba34c2f446eb159d92a7552e12fe03d73c#diff-52188a561af67e8b3433050acbea9842R46 I'm not sure why this line is required now, when it wasn't a few months ago, but whatever.
<cr1901_modern> Btw is it an artifact of the compat layer that "self.sync +=" is not necessary tied to the "sys" clock domain?
<_whitenotifier-3> [nmigen] cr1901 opened pull request #138: Spartan3A Support - https://git.io/fjin4
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555388339?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] codecov[bot] commented on pull request #138: Spartan3A Support - https://git.io/fjinR
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing cb02a45...37ffd0b - https://codecov.io/gh/m-labs/nmigen/compare/cb02a452e9c8be1c3eb52831c9143f69d79d0e97...37ffd0bb65203031b0ebf6e9401509fdfc5cb7fa
<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to cb02a45 - https://codecov.io/gh/m-labs/nmigen/compare/cb02a452e9c8be1c3eb52831c9143f69d79d0e97...37ffd0bb65203031b0ebf6e9401509fdfc5cb7fa
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<_whitenotifier-3> [nmigen-boards] whitequark commented on issue #18: Handle edge case where the same `Subsignal` uses multiple `Connectors` - https://git.io/fjic6
<_whitenotifier-3> [nmigen-boards] whitequark commented on issue #17: Factor out resource "sevenseg". - https://git.io/fjicP
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #138 commit - https://git.io/fjicD
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #138 commit - https://git.io/fjicy
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #138 commit - https://git.io/fjicS
<whitequark> cr1901_modern: the compat layer translates `self.sync` to the "sync" clock domain, not "sys"
<whitequark> otherwise you'd have to use DomainRenamer constantly in every mixed design
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<_whitenotifier-3> [nmigen] cr1901 reviewed pull request #138 commit - https://git.io/fjicF
<_whitenotifier-3> [nmigen] cr1901 reviewed pull request #138 commit - https://git.io/fjicN
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #138 commit - https://git.io/fjicA
<_whitenotifier-3> [nmigen] whitequark commented on issue #134: Add FSM state name annotations to generated Verilog output - https://git.io/fjiCf
<cr1901_modern> Is Subsignal("b") supposed to be a single entry of Pins?
<cr1901_modern> or is putting it into two Pins(), like I did, deliberate?
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #138 commit - https://git.io/fjiCU
<whitequark> cr1901_modern: yeah, typo
<_whitenotifier-3> [nmigen] cr1901 reviewed pull request #138 commit - https://git.io/fjiCL
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #138 commit - https://git.io/fjiCt
<cr1901_modern> whitequark: Okay, this back and forth re: #138. I just realized I f***ed up.
<cr1901_modern> default is _not_ the way to do "always-on" options
<cr1901_modern> and I just somehow realized this instead of, ya know, looking at EVERY OTHER TEMPLATE IN THE FILE
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<_whitenotifier-3> [nmigen] cr1901 synchronize pull request #138: Spartan3A Support - https://git.io/fjin4
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555477603?utm_source=github_status&utm_medium=notification
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<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to cb02a45 - https://codecov.io/gh/m-labs/nmigen/compare/cb02a452e9c8be1c3eb52831c9143f69d79d0e97...d21aacfd276bc0e1e93d59c855e960aec489f75d
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing cb02a45...d21aacf - https://codecov.io/gh/m-labs/nmigen/compare/cb02a452e9c8be1c3eb52831c9143f69d79d0e97...d21aacfd276bc0e1e93d59c855e960aec489f75d
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<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+1/-1/±0] https://git.io/fjiCN
<_whitenotifier-3> [m-labs/nmigen] cr1901 b404d60 - vendor.xilinx_spartan_3_6: Add Spartan3A family support.
<_whitenotifier-3> [nmigen] whitequark closed pull request #138: Spartan3A Support - https://git.io/fjin4
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<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555484185?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to cb02a45 - https://codecov.io/gh/m-labs/nmigen/commit/b404d603fb9411dce123fd7939f5aaa54fdb87ee
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing cb02a45...b404d60 - https://codecov.io/gh/m-labs/nmigen/commit/b404d603fb9411dce123fd7939f5aaa54fdb87ee
<_whitenotifier-3> [nmigen] peteut opened issue #139: Add `-bin_file` In Vivado Flow? - https://git.io/fjiWL
<_whitenotifier-3> [nmigen] whitequark commented on issue #139: Add `-bin_file` In Vivado Flow? - https://git.io/fjiWm
<_whitenotifier-3> [nmigen] peteut commented on issue #139: Add `-bin_file` In Vivado Flow? - https://git.io/fjiW3
<_whitenotifier-3> [nmigen] peteut opened pull request #140: vendor.xilinx_7series: generate also binary bitfile. - https://git.io/fjiWC
<_whitenotifier-3> [nmigen] whitequark reviewed pull request #140 commit - https://git.io/fjiWl
<_whitenotifier-3> [nmigen] peteut synchronize pull request #140: vendor.xilinx_7series: generate also binary bitfile. - https://git.io/fjiWC
<_whitenotifier-3> [nmigen] codecov[bot] commented on pull request #140: vendor.xilinx_7series: generate also binary bitfile. - https://git.io/fjiW8
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing b404d60...915569e - https://codecov.io/gh/m-labs/nmigen/compare/b404d603fb9411dce123fd7939f5aaa54fdb87ee...915569e82960d054bada4b8e245f3dd12182ef0c
<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to b404d60 - https://codecov.io/gh/m-labs/nmigen/compare/b404d603fb9411dce123fd7939f5aaa54fdb87ee...915569e82960d054bada4b8e245f3dd12182ef0c
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555505057?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] peteut reviewed pull request #140 commit - https://git.io/fjiW4
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/555505598?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to b404d60 - https://codecov.io/gh/m-labs/nmigen/compare/b404d603fb9411dce123fd7939f5aaa54fdb87ee...c4ee96bfcf63c33fbe0f3afb109c0bbd9fda1950
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing b404d60...c4ee96b - https://codecov.io/gh/m-labs/nmigen/compare/b404d603fb9411dce123fd7939f5aaa54fdb87ee...c4ee96bfcf63c33fbe0f3afb109c0bbd9fda1950
<_whitenotifier-3> [nmigen] whitequark synchronize pull request #140: vendor.xilinx_7series: generate also binary bitfile. - https://git.io/fjiWC
<_whitenotifier-3> [nmigen] whitequark closed issue #139: Add `-bin_file` In Vivado Flow? - https://git.io/fjiWL
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjiWa
<_whitenotifier-3> [m-labs/nmigen] peteut 31c54d3 - vendor.xilinx_7series: generate also binary bitfile.
<_whitenotifier-3> [nmigen] whitequark closed pull request #140: vendor.xilinx_7series: generate also binary bitfile. - https://git.io/fjiWC
<_whitenotifier-3> [nmigen] Success. 80.74% remains the same compared to b404d60 - https://codecov.io/gh/m-labs/nmigen/commit/31c54d32efb9c2851460adc954f5d1fa97800925
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing b404d60...31c54d3 - https://codecov.io/gh/m-labs/nmigen/commit/31c54d32efb9c2851460adc954f5d1fa97800925
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<_whitenotifier-3> [nmigen-boards] cr1901 opened pull request #19: Add Mercury platform. - https://git.io/fjilU
<_whitenotifier-3> [nmigen-boards] whitequark synchronize pull request #19: Add Mercury platform. - https://git.io/fjilU
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<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjilO
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjil3
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjils
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjilG
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjilZ
<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #19 commit - https://git.io/fjiln
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjilW
<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #19 commit - https://git.io/fjilu
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjilz
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<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #19 commit - https://git.io/fjila
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<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #19 commit - https://git.io/fjilw
<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #19 commit - https://git.io/fjilr
<_whitenotifier-3> [nmigen-boards] whitequark reviewed pull request #19 commit - https://git.io/fjili
<whitequark> maybe we should put those in board docstrings
<whitequark> actually, we *definitely* should do that
<cr1901_modern> Yea that's fine. I'll look for nicer links
<cr1901_modern> I think this is the end result of a 300 redirect
<_whitenotifier-3> [nmigen-boards] cr1901 synchronize pull request #19: Add Mercury platform. - https://git.io/fjilU
<cr1901_modern> Something like this for the docstring? http://ix.io/1NYR
<whitequark> I would prefer both the link to the overview and direct link to schematics
<cr1901_modern> Bikeshed: Do you intend to render this in Sphinx or something at some point?
* cr1901_modern forgets how to do nice urls in ReST. I think unlike Markdown, you have to put them all at the end.
<whitequark> I think we're using ReST...
<whitequark> and I don't remember the syntax offhand either
<cr1901_modern> http://ix.io/1NYS Better? Anyways it's just a prelim docstring. Make it look nice later.
<whitequark> yeah, good
<_whitenotifier-3> [nmigen-boards] cr1901 synchronize pull request #19: Add Mercury platform. - https://git.io/fjilU
<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #19 commit - https://git.io/fji8J
<cr1901_modern> whitequark: The baseboard_{sram, no_sram} resources should be fixed now. Right now I'm waiting on what to do about gpio_ctl and the SPIResources.
<cr1901_modern> After that, I think all should be acceptable.
<cr1901_modern> (Oh and I pushed the docstring)
<_whitenotifier-3> [nmigen-boards] cr1901 reviewed pull request #15 commit - https://git.io/fji8T