sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<sb0> the read eyes are still noisy...
<sb0> 000000000000000000000000000011000101001010011010011111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111011111111110100011000000000100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
<sb0> 00000000000000000000000000000000000000000000000000
<sb0> even with the LOC
<sb0> whitequark, the schematics were available for review before fabrication ...
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<whitequark> sb0: can you explain why microscope has both add_probe_single and add_probe_buffer?
<whitequark> it crashes in finalization if I don't add at least one buffer probe too
<sb0> whitequark, single is for asynchronous and infrequent sampling (like connecting to a LED), buffer has a synchronous trigger and can store a series of samples, one at each clock cycle
<whitequark> sb0: any idea about the crash in finalization?
<whitequark> I don't understand its logic well enough to fix it
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<sb0> whitequark, fixed
<GitHub180> [microscope] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/microscope/commit/a17f09531697820241ed69109099c8ebba6a129d
<GitHub180> microscope/master a17f095 Sebastien Bourdeauducq: fix corner case with no buffer probe
<sb0> all those corner cases would be easier to handle if migen supported zero-size signals... maybe something for nvmigen, when I have time for it
<whitequark> thanks
<whitequark> nvmigen?
<sb0> major migen overhaul... discussed in a few emails and irc
<sb0> that would get rid of most known ugly bits
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<cr1901_modern> sb0: How do zero-size signals help you?
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<attie> cr1901_modern: For my part, zero-size signals would be great to have whenever you create a select signal for a mux. I'm sure tired of writing "if len(l)==1: ... else:..."
<GitHub-m-labs> [misoc] jordens pushed 2 new commits to master: https://github.com/m-labs/misoc/compare/bbfdca41cd9d...00d71f77ea59
<GitHub-m-labs> misoc/master 00d71f7 Robert Jördens: Merge pull request #77 from hartytp/no_MOSI...
<GitHub-m-labs> misoc/master 52ad68a ion: make SPI2 work for busses with no MOSI (e.g. ADCs like Sampler)
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<bb-m-labs> build #418 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/418
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<kykzamej> THIS IS A FREENODE BREAKING NEWS ALERT!! Hitechcg AND opal ARE GOING AT IT RIGHT NOW WITH A LOT OF FIGHTING AND ARGUING WOW YOU DON'T WANT TO MISS THIS!! TYPE /JOIN ## TO SEE THE ACTION...AGAIN TYPE /JOIN ## TO SEE THE ACTION!!
<kykzamej> rohitksingh_wor1 attie Rex0r FabM X-Scale Gurty cjbe__ bb-m-labs felix_ ncl juliusb AceChen _whitelogger balrog ohama cr1901_modern acathla hozer rqou sn00n kyak gric wolfspraul reportings mithro hjr3 _florent_ Ishan_Bansal jaeckel forrestv kristianpaul cedric whitequark awygle marbler milk early siruf larsc ohsix kmehall Ultrasauce cyrozap rjo kuldeep stekern davidc__ q3k nurelin ysionneau edef sandeepkr adamgreig
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<GitHub-m-labs> [artiq] whitequark pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/5cb2602021fd29db21f1e7998829b012387ca907
<GitHub-m-labs> artiq/master 5cb2602 whitequark: artiq_devtool: flash gateware if -g is passed.
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<bb-m-labs> build #1351 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1351
<GitHub-m-labs> [artiq] sbourdeauducq opened issue #959: flterm broken on windows https://github.com/m-labs/artiq/issues/959
<GitHub-m-labs> [artiq] sbourdeauducq opened issue #960: board packages no longer installable on windows https://github.com/m-labs/artiq/issues/960
<bb-m-labs> build #780 of artiq-win64-test is complete: Warnings [warnings python_unittest] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/780 blamelist: whitequark <whitequark@whitequark.org>
<bb-m-labs> build #2186 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2186
<GitHub-m-labs> [artiq] sbourdeauducq closed issue #956: the kc705 board can not be found through Internet https://github.com/m-labs/artiq/issues/956
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<GitHub-m-labs> [artiq] JKiethe opened issue #961: o1rk-linux-ld cannot open output file https://github.com/m-labs/artiq/issues/961
<GitHub-m-labs> [artiq] JKiethe commented on issue #961: (filed for @jordens)... https://github.com/m-labs/artiq/issues/961#issuecomment-373339466
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<GitHub-m-labs> [misoc] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/misoc/commit/103bb3a8421852d486e6e48477634967aea293c8
<GitHub-m-labs> misoc/master 103bb3a Sebastien Bourdeauducq: flterm: fix startup on Windows...
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<bb-m-labs> build #419 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/419
<7JTADPD3R> [artiq] sbourdeauducq commented on issue #935: No, it doesn't. https://github.com/m-labs/artiq/issues/935#issuecomment-373357269
<17SAATCZL> [artiq] sbourdeauducq reopened issue #935: Artiq 2.4: Experiment fails to run on Windows because cygwin1.dll can't be found https://github.com/m-labs/artiq/issues/935
<GitHub-m-labs> [artiq] sbourdeauducq commented on issue #935: Still happens with binutils-or1k-linux 2.27 5. https://github.com/m-labs/artiq/issues/935#issuecomment-373357353
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<sb0> it's pretty amazing how shitty internet with chinese characteristics is, even for unblocked connections (including SSH tunnels)
<sb0> 4G roaming with a HK simcard works really well to bypass all the crap, but it is slightly expensive
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<GitHub-m-labs> [artiq] jordens commented on issue #961: Potentially #935 https://github.com/m-labs/artiq/issues/961#issuecomment-373464140
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<rjo> sb0: TP-link MC220L with Kasli and fs.com SFPs works, right?
<whitequark> sb0: it's deliberate
<whitequark> all unknown traffic is slowed down to a crawl just in case it's used for tunneling
<rjo> whitequark: could you please prioritize the binutils on windows issues over all the i2c things etc?
<GitHub-m-labs> [artiq] whitequark commented on issue #935: No, it doesn't. I have provisioned a completely fresh Windows machine just now and installed only the binutils-or1k-linux package, and it doesn't crash because of `cygwin1.dll`:... https://github.com/m-labs/artiq/issues/935#issuecomment-373520539
<whitequark> I'm working on it
<whitequark> just installed a VM locally
<GitHub-m-labs> [artiq] whitequark commented on issue #961: @jordens Unlikely, this is probably caused by the 8.3 path: `C:\Users\MULTI-~1\...` https://github.com/m-labs/artiq/issues/961#issuecomment-373521716
<rjo> whitequark: ack. thanks.
<rjo> whitequark: yeah. i also noticed the patch thing.
<rjo> *path
<rjo> especially since the filename part of the path is longer than 8.3
<whitequark> likely what happened is:
<whitequark> %TEMP% has a 8.3 path in it for some reason, but MSYS uses the UNC notation
<whitequark> I'm not completely sure yet though
<whitequark> nope.
<whitequark> C:\Users\user\AppData\Local\Temp\tmpfhhlx5ef still fails. Result: SHARING VIOLATION according to procmon
<whitequark> this is bizarre
<rjo> maybe we can just go to a different directory as a work around?
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<whitequark> it's even weirder than that
<whitequark> running the command manually from the console works
<whitequark> it only fails when ran by python
<whitequark> actually wait I have an idea
<whitequark> of course.
<whitequark> the temporary file is created by python and it looks like python is now placing some kind of lock on it
<GitHub-m-labs> [artiq] whitequark closed issue #961: o1rk-linux-ld cannot open output file https://github.com/m-labs/artiq/issues/961
<whitequark> rjo: I fixed it
<GitHub-m-labs> [artiq] whitequark pushed 1 new commit to release-3: https://github.com/m-labs/artiq/commit/ba017147fcdbe0cb661ed2d5019a40a424592f4e
<GitHub-m-labs> artiq/release-3 ba01714 whitequark: compiler: do not pass files to external tools while they are opened....
<GitHub-m-labs> [artiq] whitequark commented on issue #935: And I can actually `artiq_compile` code with these binutils. https://github.com/m-labs/artiq/issues/935#issuecomment-373542251
<rjo> whitequark: thanks!
<rjo> whitequark: we were playing with windows and the camera yesterday. it does look a bit weird and we didn't yet get it to work.
<rjo> whitequark: their "lightfield" software doesn't see the camera (but probably a usb dongle license issue with the license locked to camera **and** dongle...). one firmware updater didn't see the camera, the other didn't want to touch it (greyed out OK button).
<whitequark> so it wasn't just me...
<rjo> whitequark: probably not.
<rjo> and the paths are the same now? mixing 8.3. and UNC in the same path is fine?
<rjo> mixing 8.3 and "long names" (or whatever they are called).
<whitequark> I don't think that was ever the issue
<whitequark> it doesn't look like MSYS forces UNC
<bb-m-labs> build #1352 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1352
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<GitHub-m-labs> [artiq] whitequark closed issue #960: board packages no longer installable on windows https://github.com/m-labs/artiq/issues/960
<GitHub-m-labs> [artiq] whitequark pushed 1 new commit to release-3: https://github.com/m-labs/artiq/commit/24925f1c9e89885c02b87b258885680b9d624761
<GitHub-m-labs> artiq/release-3 24925f1 whitequark: conda: mark the artiq-build output package as noarch, not toplevel....
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