sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub70> [artiq] sbourdeauducq commented on issue #883: Did you also see ``test_host_to_device`` fail?... https://github.com/m-labs/artiq/issues/883#issuecomment-355179072
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<hartytp> sb0: out of curiosity, did you have more problems with the 1v8 thing? Did the extra cooling make a difference (even if it didn't eliminate it) or was it just a red herring?
<sb0> hartytp, hard to tell. one would need proper statistical analysis to answer this question.
<hartytp> okay, that sounds like if it did make a difference, it wasn't a large one. Oh well...time to wait for Greg's better diagnostics then.
<sb0> I'm also getting a uTCA crate soon, with powerful fans...
<hartytp> nice! That's good. One of Greg's 1U ones, or a Schroff/etc one?
<sb0> the big ones that can take several boards (will use for drtio)
<hartytp> The one we have has fans that sounds like they were specified for trans-atlantic flight, so I'm guessing the cooling power is quite high
<sb0> yes, this kind of crate
<hartytp> the NAT one with the LLRFBP?
<sb0> should be NAT, but not sure what model
<sb0> Joe ordered it
<hartytp> ack, same one then. It's a bit of a beast, but good to know we'll all be using the same model and chasing the same issues.
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<GitHub78> [artiq] sbourdeauducq commented on commit 745e695: Shouldn't this be in another clock domain? https://github.com/m-labs/artiq/commit/745e695b0948a82cbb99ca8b3c348d8406feed85#commitcomment-26630628
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<sb0> hartytp: oh and by the way, we can make the ethernet non-cc pins a complete non-issue by putting the PHY in DTE mode
<sb0> we may actually want to do that, since then the issue doesn't have to be corrected on the board, and a single bitstream can be kept. but that would limit Ethernet speed to 100Mbps.
<sb0> we could fix it on Metlino to keep the 1Gbps option open
<sb0> whitequark, ping
<whitequark> sb0: pong
<sb0> whitequark, I'm finishing the report right now, can you send me something?
<sb0> rjo, why is the New Focus 8742 driver outside the artiq tree?
<sb0> we already have drivers for third-party hardware e.g. lda, thorlabs motors, etc. in-tree, so why is this one an exception?
<whitequark> rjo: I have not tried the new bootloader with a cold start of kc705 as it did not occur to me
<whitequark> what sort of bugs would you expect?
<sb0> whitequark, see issue
<whitequark> sb0: there's 46 emails in my inbox since yesterday, *which* issue?
<whitequark> thanks
<whitequark> sb0: why is the busy_wait needed?
<sb0> the ethernet chips need long reset pulses, e.g. the one on sayma at least 100µs
<whitequark> oh ok so that should be wait_us(100)
<sb0> make it milliseconds as it is
<sb0> there is no disadvantage to a large reset pulse length margin
<whitequark> oh, that's 2ms, I misunderstood
<whitequark> I thought it was smaller than 100us
<sb0> whitequark, report goes out within the hour
<whitequark> sb0: I'm not sure what to write there, it's mostly a lot of minor smoltcp fixes
<whitequark> and the elimination of C code but that's unaffecting the end users
<sb0> well, yes, but a few of those end users like to get their hands dirty, so we can put one sentence about that
<sb0> whitequark, ^
<sb0> also I thought that this code was to produce crash traces that make it easier to locate problems? that's relevant to any user
<sb0> it's not there yet, but the reports should also say where the projects are going
<whitequark> ok, let me write something real quick
<whitequark> sb0: done
<sb0> thanks
<whitequark> astounding
<whitequark> whatever the interbank system is between RU and HK, it broke
<whitequark> I can't withdraw any cash from any ATM using any of my HK cards
<whitequark> sb0, would you be open to paying be in Bitcoin? :P
<sb0> I'll ask the auditor, but considering HK's mentality this is unlikely to be a problem
<whitequark> cool. I might deal with it myself via ANXPRO, not sure yet
<whitequark> hahahahah
<sb0> that's a long report. we've done a lot this month.
<GitHub62> [artiq] whitequark commented on issue #885: Hmm, that's very strange, I wonder if it's a race condition? Ideally we would not fork for symbolication... https://github.com/m-labs/artiq/issues/885#issuecomment-355209918
<GitHub100> [artiq] sbourdeauducq commented on issue #885: Fork? https://github.com/m-labs/artiq/issues/885#issuecomment-355210283
<GitHub113> [artiq] whitequark commented on issue #885: We execve addr2line to get the symbolized backtrace instead of a list of addresses. https://github.com/m-labs/artiq/issues/885#issuecomment-355210487
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<GitHub147> [artiq] jordens commented on issue #883: No. You are seeing the same things I see. https://github.com/m-labs/artiq/issues/883#issuecomment-355213702
<GitHub28> [artiq] jordens commented on commit 745e695: It still serves it's purpose and outputs data. https://github.com/m-labs/artiq/commit/745e695b0948a82cbb99ca8b3c348d8406feed85#commitcomment-26632446
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<GitHub6> [artiq] sbourdeauducq commented on commit 745e695: But that data can be quite chaotic... https://github.com/m-labs/artiq/commit/745e695b0948a82cbb99ca8b3c348d8406feed85#commitcomment-26632831
<GitHub184> [artiq] sbourdeauducq commented on issue #862: Seems to work. Should we close this? https://github.com/m-labs/artiq/issues/862#issuecomment-355224195
<sb0> there's definitely more than a thermal issue with the power supply. 1v8 just failed with a cold board.
<sb0> "simple user error" eh
<whitequark> sb0: SC is a trash fire... they just rejected a telegraphic transwer with "Reject reason: We are unable to process your request."
<whitequark> something like two weeks in.
<whitequark> this is so absurdly bad it's not even funny
<sb0> rjo, we should definitely configure the attenuator on allaki. the noise level is quite high, and depends on electrical noise around the building, e.g. switching on all fluorescent lights in the room brings it into the 10's of mV
<sb0> hopefully the uTCA crate shielding will improve that
<sb0> rjo, I put them on GPIOs over the WB bridge
<sb0> the bare attenuator IOs I mean
<GitHub75> [artiq] enjoy-digital commented on issue #862: yes we can close it. (it's also validated on the boards i have) https://github.com/m-labs/artiq/issues/862#issuecomment-355247074
<GitHub18> [artiq] enjoy-digital closed issue #862: serwb scrambling https://github.com/m-labs/artiq/issues/862
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<GitHub143> [artiq] whitequark pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/fc9766d2fa4b694a183330d8a403035f4419b143
<GitHub143> artiq/master fc9766d whitequark: firmware: reset ethphy before initializing smoltcp (fixes #884).
<GitHub133> [artiq] whitequark closed issue #884: [new bootloader] kc705 ethernet link remains down after cold boot https://github.com/m-labs/artiq/issues/884
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<bb-m-labs> build #1031 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1031
<bb-m-labs> build #674 of artiq-win64-test is complete: Warnings [warnings python_coverage] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/674 blamelist: whitequark <whitequark@whitequark.org>
<bb-m-labs> build #1909 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1909
<rjo> sb0: having the drivers in-tree is a bad idea in most cases (and in this one).
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<sb0> rjo, so should lda etc. be removed?
<sb0> what do we keep in-tree? own hardware?
<rjo> sb0: imho, drivers that are useful without artiq (and where you can expect someone doesn't want to pull in all the artiq dependencies) or drivers that pull in other dependencies (hidapi for lda or libusb/pyusb for newfocus8742) can well be separate.
<sb0> ok
<rjo> it also decouples development. people can then pin the driver version in their environment independently of the artiq version. luckily the atriq controller api looks stable.
<rjo> (i may have advocated the other position a few years back but that was before we had a reasonable packaging and testing infrastructure)
<sb0> whitequark, why is the log level set late in the runtime? don't we want to debug startup?
<GitHub46> [artiq] sbourdeauducq pushed 2 new commits to master: https://github.com/m-labs/artiq/compare/fc9766d2fa4b...161a41456738
<GitHub46> artiq/master e1a75ac Sebastien Bourdeauducq: runtime: set log level early...
<GitHub46> artiq/master 161a414 Sebastien Bourdeauducq: serwb: debug print on error
<GitHub37> [artiq] sbourdeauducq commented on commit e1a75ac: @whitequark Is this right? https://github.com/m-labs/artiq/commit/e1a75ac1c14cdd7c85a12be907437b331b4e430e#commitcomment-26639101
<GitHub145> [artiq] jordens opened issue #886: rust sdram init code breaks support for hardcoded write leveling https://github.com/m-labs/artiq/issues/886
<GitHub4> [misoc] jordens pushed 1 new commit to master: https://github.com/m-labs/misoc/commit/4b7cf297decb7ff918b3bf89a74f6a85f4c2e4a3
<GitHub4> misoc/master 4b7cf29 Robert Jordens: kasli: add builder arg handling boilerplate
<bb-m-labs> build #1032 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1032
<bb-m-labs> build #333 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/333
<bb-m-labs> build #675 of artiq-win64-test is complete: Warnings [warnings python_coverage] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/675 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<bb-m-labs> build #1910 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1910
<GitHub2> [artiq] jordens pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/8813aee6b1514cd649f5c5c34a05a8be27141c58
<GitHub2> artiq/master 8813aee Robert Jordens: targets: add kasli [wip, untested]
<GitHub171> [migen] jordens pushed 1 new commit to master: https://github.com/m-labs/migen/commit/13494eb1b6c50e7bc86c8495ebeb6546d1ee411d
<GitHub171> migen/master 13494eb Robert Jordens: kasli: fix lvds io standard name
<GitHub150> [artiq] jordens commented on issue #886: New init code also broken when handling the Kasli Ethernet PHY.... https://github.com/m-labs/artiq/issues/886#issuecomment-355307856
<bb-m-labs> build #227 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/227
<rjo> sb0: walk me through the sayma testing setup. how do i load the rtm fpga?
<sb0> rjo, look at /home/sb/load_rtm
<sb0> and in sayma_new.cfg the ftdi_location lines correspond to the respective saymas
<sb0> UARTs are /dev/ttyUSB_saymaX_Y
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<sb0> Y=0 main UART (bootloader/runtime), Y=1 secondary UART (RTM or microscope), Y=3 MMC UART
<hartytp> sob: re "simple user error" okay, that was a bit harsh (although, IIRC, I did caveat it with "if that really is what this is" or similar). Apologies. But, as I said, the frustrations I was venting weren't just from that.
<hartytp> sb0
<hartytp> (fat fingers in the am)
<rjo> sb0: ack.
<hartytp> re ethernet: personally, I'm not worried about maintaining compatibility with Sayma v1.0 and would prefer to open the option of Gbps ethernet in Sayma v2.0 by fixing the cc pin
<bb-m-labs> build #1033 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1033
<hartytp> Looks like we're going to make plenty of other changes to Sayma v1.0 like adding the extra LVDS links between the AMC and RTM, so it's better (IMHO) just to obsolete the v1.0 boards.
<sb0> well, we'd have to discuss that with people who have 1.0 boards
<hartytp> (well, not "plenty" but at least one or two other changes). Better just to obsolete the prototypes and focus on getting a really good v2.0 than to make compromises in all future versions of Sayma to keep the 10 v1.0 boards we have working from the same bitstream
<hartytp> sb0: ack. Ultimately it's Joe's decision since he paid for all of this.
<hartytp> anyway, we can worry about this once we've finished bug hunting/fixing in v1.0
<bb-m-labs> build #676 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/676
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<bb-m-labs> build #1911 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1911
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<jkeller> bb-m-labs: force build --props=package=artiq-kc705-nist_qc2 --branch=release-3 artiq-board
<bb-m-labs> build forced [ETA 19m01s]
<bb-m-labs> I'll give a shout when the build finishes
<GitHub24> [smoltcp] dlrobertson commented on pull request #110 b930d1c: kept `saturating_sub` and renamed `advance` for `checked_add` and `sub` for `checked_sub`. https://github.com/m-labs/smoltcp/pull/110#discussion_r159709887
<GitHub12> [smoltcp] dlrobertson commented on pull request #110 b930d1c: Renamed `advance` to `checked_add` so anyone that needs to worry about overflows can (no idea who will). https://github.com/m-labs/smoltcp/pull/110#discussion_r159709640
<GitHub19> [smoltcp] dlrobertson commented on pull request #110 b930d1c: Updated https://github.com/m-labs/smoltcp/pull/110#discussion_r159709421
<GitHub129> [artiq] gkasprow commented on issue #854: @sbourdeauducq any wish how exactly would you line to trigger the register dump?... https://github.com/m-labs/artiq/issues/854#issuecomment-355347759
<GitHub85> [artiq] sbourdeauducq commented on issue #854: > For example P for Exar chip and E for PHY chip.... https://github.com/m-labs/artiq/issues/854#issuecomment-355348041
<bb-m-labs> build #1034 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1034
<GitHub184> [artiq] whitequark commented on issue #886: > The old SDRAM code supported Spartan 6 and Artiz 7 memory PHYs that have hardcoded write leveling through the DQS clocks. The new rust sdram init code breaks this (and therefore Kasli).... https://github.com/m-labs/artiq/issues/886#issuecomment-355353417
<GitHub182> [artiq] whitequark commented on commit e1a75ac: @sbourdeauducq No, if you set the log level to ERROR you will miss the message about erasing startup/idle kernels (for example). https://github.com/m-labs/artiq/commit/e1a75ac1c14cdd7c85a12be907437b331b4e430e#commitcomment-26644304
<GitHub177> [artiq] sbourdeauducq commented on commit e1a75ac: Could that message be emitted in all cases somehow? https://github.com/m-labs/artiq/commit/e1a75ac1c14cdd7c85a12be907437b331b4e430e#commitcomment-26644464
<GitHub172> [artiq] whitequark commented on commit e1a75ac: `println!`, maybe. https://github.com/m-labs/artiq/commit/e1a75ac1c14cdd7c85a12be907437b331b4e430e#commitcomment-26644572
<GitHub113> [artiq] jordens commented on issue #886: Sure. Until the new code (in ARTIQ) replaces the old one (still current in MiSoC), forking means twice the work. https://github.com/m-labs/artiq/issues/886#issuecomment-355355814
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<GitHub108> [smoltcp] dlrobertson opened pull request #113: Fix documentation warnings (master...fix_docs) https://github.com/m-labs/smoltcp/pull/113
<GitHub119> [smoltcp] dlrobertson commented on issue #113: I'm okay with dropping the code block changes due to [rust-lang/rust#38739](https://github.com/rust-lang/rust/issues/38739) https://github.com/m-labs/smoltcp/pull/113#issuecomment-355401587
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<GitHub146> [smoltcp] whitequark commented on pull request #113 9a307a3: This change makes it a real pain in the ass to update large code blocks. https://github.com/m-labs/smoltcp/pull/113#discussion_r159760282
<GitHub193> [smoltcp] whitequark commented on pull request #113 9a307a3: Wait, what? How is this legal Markdown? https://github.com/m-labs/smoltcp/pull/113#discussion_r159760219
<GitHub34> [smoltcp] dlrobertson commented on pull request #113 9a307a3: Its not :(. I was playing around with some stuff and it got lumped in here. https://github.com/m-labs/smoltcp/pull/113#discussion_r159763199
<GitHub121> [smoltcp] dlrobertson commented on pull request #113 9a307a3: Agreed. If we're okay with some extra warnings, I'd be okay with going back to `/*!`. https://github.com/m-labs/smoltcp/pull/113#discussion_r159763831
<sb0> rjo, ok to merge sed?
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<GitHub150> [artiq] jonaskeller commented on issue #874: I tried reproducing the error today. In 3.1 py_35+git3ba82cf1, only the duplicate TCP packets appeared, but it never entered the ACK loop. So maybe this is already fixed.... https://github.com/m-labs/artiq/issues/874#issuecomment-355432744