<GitHub74>
[artiq] jbqubit commented on issue #751: This doesn't change the fact that the implementation lacks an adequate reset mechanism for swag. Establishing a well known starting state is crucial. Some reasons. ... https://github.com/m-labs/artiq/issues/751#issuecomment-309071304
<jbqubit>
jordens: "The sum of their outputs is then interpolated by a factor of parallelism (2, 4, 8 depending on the bitstream)." If parallelism depends on bitstream it shouldn't be user-configurable in device_db.py.
<sb0>
rjo, rio_phy is things that should not be usually reset when new experiments start (e.g. TTL state), rio is what gets reset with core.reset()
<sb0>
for the SAWG maybe just reload all state using the regular writes? no gateware changes required
<GitHub180>
[artiq] jbqubit commented on issue #754: Why perpetuate this annoying (and I gather vestigial) aspect of ARTIQ in SAWG? If the value of parallelism is already specified in the part of ARTIQ that defines .bit, it's poor design to have the same value repeated in device_db.py. ... https://github.com/m-labs/artiq/issues/754#issuecomment-309078977
<GitHub155>
[artiq] sbourdeauducq commented on issue #754: Because having automatic generation of device database (#355) would solve it for all devices (as far as it can be done, for example things like exact DDS frequencies may not be known) and not only for SAWG. https://github.com/m-labs/artiq/issues/754#issuecomment-309080250