sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub192> [artiq] jbqubit commented on issue #743: Switched to using 1 GS/s old school LeCroy 9354AM.... https://github.com/m-labs/artiq/issues/743#issuecomment-307270585
<GitHub11> [artiq] jbqubit opened issue #744: sawg api: absolute vs relative phase modes https://github.com/m-labs/artiq/issues/744
<GitHub150> [artiq] klickverbot commented on issue #744: (Fixed code block syntax.) https://github.com/m-labs/artiq/issues/744#issuecomment-307273753
<GitHub122> [artiq] klickverbot commented on issue #744: (Fixed code block syntax.) https://github.com/m-labs/artiq/issues/744#issuecomment-307273753
<GitHub147> [artiq] sbourdeauducq commented on issue #40: Nope. There is no funding for it plus we need to get 3.0 out soon, and things like #685 are already a major difficulty. https://github.com/m-labs/artiq/issues/40#issuecomment-307278124
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<GitHub47> [artiq] sbourdeauducq commented on issue #563: It's already there, 4th item. https://github.com/m-labs/artiq/issues/563#issuecomment-307281633
<GitHub38> [artiq] sbourdeauducq commented on issue #563: IOSERDES is also funded now (Joe/ARL). https://github.com/m-labs/artiq/issues/563#issuecomment-307281783
<GitHub162> [artiq] dhslichter commented on issue #40: I don't want to delay 3.0 any further with this, and as @sbourdeauducq points out there are many more issues to be addressed with higher priority for users. While figuring out the latencies is an important issue to address in the fullness of time, it is also something that can be addressed simply, with the current ARTIQ, by end users -- you just wrap pulse/on/off methods with something that looks at the
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<mithro> rjo: I'm fairly confident the problem is a combinational loop in Ishan's code - is there a good way to figure out where the loop is happening?
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<GitHub161> [artiq] whitequark pushed 14 new commits to master: https://github.com/m-labs/artiq/compare/91ad2bc60066...f7254dd3cec7
<GitHub161> artiq/master dba4e1a whitequark: compiler: add support for bytes type and b"x" literals (#714).
<GitHub161> artiq/master d0e9206 whitequark: ksupport: fix UB.
<GitHub161> artiq/master ffc6745 whitequark: Revert "update/cleanup gitignore"...
<GitHub65> [artiq] whitequark commented on issue #714: done https://github.com/m-labs/artiq/issues/714#issuecomment-307319190
<GitHub181> [artiq] whitequark closed issue #714: iterate over binary data https://github.com/m-labs/artiq/issues/714
<bb-m-labs> build #1542 of artiq is complete: Failure [failed lit_test] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1542 blamelist: whitequark <whitequark@whitequark.org>
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<sb0> mithro, not really; though it would be possible to add a combinatorial loop tracer to the migen simulator
<sb0> do you need a GSoC project? :)
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<rjo> builing the graph of signal dependencies would allow you to detect loops before even executing. and it would speed up the simulator because you only need to execute a part of the graph on each delta cycle.
<GitHub51> [artiq] jordens commented on issue #743: Ok. Looks like the HBF is clipping. Does it also do that if you jump the phase of the DUC (`phase0`)? https://github.com/m-labs/artiq/issues/743#issuecomment-307340361
<GitHub50> [artiq] jordens commented on issue #40: That's the scheme we would advocate as well. It would just be nice to have examples and some skeleton code that shows how it can be implemented. https://github.com/m-labs/artiq/issues/40#issuecomment-307341337
<GitHub100> [artiq] jordens commented on issue #744: @jboulder Can we please not abuse the API just to scratch a linguistic itch?... https://github.com/m-labs/artiq/issues/744#issuecomment-307344095
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<GitHub130> [artiq] jordens pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/d8aee931ba0b6fcff75b0c3f8cd6a92ec845682e
<GitHub130> artiq/master d8aee93 Robert Jordens: sawg: extend phase mode docs
<GitHub47> [artiq] jordens commented on issue #744: d8aee931 https://github.com/m-labs/artiq/issues/744#issuecomment-307354588
<GitHub197> [artiq] jordens closed issue #744: sawg api: absolute vs relative phase modes https://github.com/m-labs/artiq/issues/744
<bb-m-labs> build #1543 of artiq is complete: Failure [failed lit_test] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1543 blamelist: Robert Jordens <rj@m-labs.hk>
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<sb0> rjo, there are some nasty edge cases with that, e.g. with partial assignments to a slice of a signal, but yes
<rjo> sb0: yes. if that really turns out to be a challenge one can still relax the definition of that graph. it doesn't need to be "optimal". just reducing the set of "potential" sensitivity signals from "all" would help already.
<GitHub132> [artiq] jbqubit commented on issue #40: > you just wrap pulse/on/off methods with something that looks at the channel being operated on and adds/subtracts a deterministic amount looked up from a calibration dataset... https://github.com/m-labs/artiq/issues/40#issuecomment-307417907
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<GitHub59> [artiq] jbqubit commented on issue #743: Here's my test code for sweeping phase0. ... https://github.com/m-labs/artiq/issues/743#issuecomment-307422190
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<GitHub65> [artiq] dhslichter commented on issue #40: Why does the end user wrapping this result in a "terrible mess" in experiment files? Just create a subclass called `TTLOutLC(TTLOut)`, and implement the modified versions of the methods as needed. Then just use `TTLOutLC` instead of `TTLOut` in your experiment code. Seems incredibly clean and simple to me. Now, if you set latencies to be wacky numbers you may get some tricky corner cases (such as the a
<GitHub158> [artiq] dhslichter commented on issue #40: Why does the end user wrapping this result in a "terrible mess" in experiment files? Just create a subclass called `TTLOutLC(TTLOut)`, and implement the modified versions of the methods as needed. Then just use `TTLOutLC` instead of `TTLOut` in your experiment code. Seems incredibly clean and simple to me. Now, if you set latencies to be wacky numbers you may get some tricky corner cases (such as the
<GitHub128> [artiq] jbqubit commented on issue #40: So rather than modifying six lines of code in the ARTIQ code base each lab is now creating a new class, overloading 7 members of TTLOut and debugging it. In TTL PHY repeat for ... https://github.com/m-labs/artiq/issues/40#issuecomment-307430994
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<GitHub28> [artiq] dhslichter commented on issue #40: So submit the above patch to the ARTIQ code base. For `TTLInOut` and `TTLClockGen` should be similar. https://github.com/m-labs/artiq/issues/40#issuecomment-307438460
<GitHub35> [artiq] jbqubit commented on issue #40: @jordens asked... https://github.com/m-labs/artiq/issues/40#issuecomment-307449404
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<GitHub101> [artiq] jbqubit opened issue #745: sawg: RTIO timing error between SAWG and TTLOut https://github.com/m-labs/artiq/issues/745
<GitHub45> [artiq] jordens commented on issue #745: What should I be looking at?... https://github.com/m-labs/artiq/issues/745#issuecomment-307470614
<GitHub0> [artiq] jordens commented on issue #40: @jbqubit this is not how we operate. Happy to make it for-contract. But that is mutually exclusive with adding it to a milestone.... https://github.com/m-labs/artiq/issues/40#issuecomment-307471620
<GitHub170> [artiq] jbqubit commented on issue #745: See movie in link which shows slip. ARTIQ needs a mechanism to permit synchronization of all RTIO/DRTIO devices the outset of an experiment. https://github.com/m-labs/artiq/issues/745#issuecomment-307474734
<GitHub76> [artiq] jbqubit commented on issue #40: Let's discuss a first order solution that addresses gross latency first. 1) PHY-to-PHY latency (eg TTL to SWAG, currently couple micro-second) 2) cable length. ... https://github.com/m-labs/artiq/issues/40#issuecomment-307478066
<GitHub127> [artiq] jordens commented on issue #745: I have understood that I should look at the movie. But what in the movie shows "RTIO timing error between SAWG and TTLOut"? If you want decent bug triage, please provide a decent description of the problem.... https://github.com/m-labs/artiq/issues/745#issuecomment-307479547
<GitHub27> [artiq] jordens commented on issue #745: Are you sure you are not just seeing a beating between the timebase of your oscilloscope and the RTIO/DAC frequency? Again, I don't know what I should be looking at in that movie. https://github.com/m-labs/artiq/issues/745#issuecomment-307479907
<GitHub78> [artiq] jbqubit commented on issue #745: Yes I'm sure. Here's another video in which its easier to see. Or you could run the code on your own machine. ... https://github.com/m-labs/artiq/issues/745#issuecomment-307481344
<GitHub185> [artiq] dleibrandt opened issue #746: Missing pythonparser in artiq-2.3 conda installation https://github.com/m-labs/artiq/issues/746
<GitHub167> [artiq] sbourdeauducq commented on issue #746: What conda version? Try updating it and reinstalling. https://github.com/m-labs/artiq/issues/746#issuecomment-307498768
<GitHub196> [artiq] dleibrandt closed issue #746: Missing pythonparser in artiq-2.3 conda installation https://github.com/m-labs/artiq/issues/746
<GitHub50> [artiq] dleibrandt commented on issue #746: That fixed the problem. Thanks. https://github.com/m-labs/artiq/issues/746#issuecomment-307505349