<MoeIcenowy>
oh now should I adopt a sun4i-emac driver? ;-)
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<beeble>
montjoie: approximately 60ps steps. but thats due reasoning not measuring. don't have equipment with that OCOCresolution
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<wens>
MoeIcenowy: it's 0x34, but shifted :/
<MoeIcenowy>
montjoie: how to specify regulators for it?
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<montjoie>
see example in bpim2+ DT (or pine64)
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<MoeIcenowy>
montjoie: how for more than one regulators?
<codekipper>
stnd: have you enabled the building of the audio components in your sunxi_defconfig? "ls sound/soc/sunxi" - if you don't see any objects then they're not being built
<montjoie>
MoeIcenowy: good question
<MoeIcenowy>
on some boards (e.g. Pine64 and BPi-M2U)
<MoeIcenowy>
there's one regulator for powering up PHY
<MoeIcenowy>
and another regulator for the I/O voltage ofr PHY
<MoeIcenowy>
s/ofr/of/g
<codekipper>
lurchi_: i'm currently looking at implementing the audio codec on the A64 based on the A33 delivery...it's WIP. I2S i did get working based on the h3 changes I made..however it wasn't working last night
<montjoie>
it seems that I need to patch my driver for an additionnal regualtor
<MoeIcenowy>
codekipper: the digital part on A64 seems very similar to A33
<MoeIcenowy>
but the analog part is more complex
<MoeIcenowy>
and the Allwinner didn't even keep the sequence of registers...
<codekipper>
yeah..it's similar just the TXFIFO address is the same as the i2s block
<codekipper>
my changes for the h3 i2s prepare me for this
<MoeIcenowy>
codekipper: please check whether you did duplicate work with Mylene
<MoeIcenowy>
(Mylene is the author of A33 codec support
<codekipper>
but I don't hear any analog activity....switching of amps etc
<codekipper>
I'm based on top of hers
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<MoeIcenowy>
montjoie: dwmac-sun8i failed to work on R40...
<wens>
MoeIcenowy: there was no clk for it in a20 either
<montjoie>
perhaps syscon register is different
<wens>
it's the same tx/rx delay stuff you see in the syscon on h3
<montjoie>
so MoeIcenowy you should change the emac comptable to h3 and not a64
<MoeIcenowy>
:q
<MoeIcenowy>
oh...
<MoeIcenowy>
P.S. I think now dwmac-sunxi driver may be renamed to dwmac-sun7i
<MoeIcenowy>
to differ with dwmac-sun8i
<wens>
no, what i meant was that the syscon register might be in the ccu
<wens>
best look at the bsp driver
<MoeIcenowy>
but the CCU changed a lot from A20 to R40
<MoeIcenowy>
R40 is a sun6i-style CCU
<wens>
A31 gmac clock is also in CCU
<montjoie>
wens: any idea for my tx/rx delay question ?
<MoeIcenowy>
maybe I should try EMAC first ;-)
<wens>
montjoie: nope, that is a question for allwinner
<MoeIcenowy>
Allwinner used the mainlined sun4i-emac for the EMAC on R40
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<MoeIcenowy>
oh my problems page forgot to be sent to
<MoeIcenowy>
wens: maybe you are right...
<MoeIcenowy>
the bsp dt show reg = <0x0 0x01c50000 0x0 0x40000>, <0x0 0x01c20164 0x0 0x04>;
<MoeIcenowy>
P.S. for A64 it shows reg = <0x0 0x01c30000 0x0 0x40000>, <0x0 0x01c00000 0x0 0x30>;
<MoeIcenowy>
oh my god I used wrong base address!
<MoeIcenowy>
SO SILLY ICENOWY IS
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<beeble>
montjoie: they have to be picosecond steps. they only question is if its a 1ns or more of a 2ns range you get with the register. i would guess its -1 to 1 ns for the 5bit register and -0.5 to 0.5 for the 4bit
<MoeIcenowy>
ok let me forget GMAC at first
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<wens>
argh, real bad day at the office :/
<MoeIcenowy>
oh BPi M2U uses axp_gpio 0 for WLAN interrupt...
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<MoeIcenowy>
the BSP have even disabled mmc1... so mysterious
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* MoeIcenowy
trying to enable EMAC on R40
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* Nemo_bis
misread "psicosecond"
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<montjoie>
now time to code dwmac-sun8i v2
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<jelle>
nice :)
<montjoie>
oen comment from mripard force me to add another big cleanup patch
<montjoie>
argh
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<BroderTuck>
montjoie: is it DWMAC as in 'config DWMAC_SUN8I', GMAC as in 'tristate "Allwinner sun8i GMAC support"', or EMAC as in "Support for Allwinner H3 A83T A64 EMAC ethernet controllers" ?
<BroderTuck>
(path 05/21)
<montjoie>
it's the same
<wens>
might want to call it EMAC, matching whats in the datasheets
<montjoie>
ah ok the question was GMAC vs EMAC
<montjoie>
yes datasheet speak about EMAC so I keep it
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<willmore>
MoeIcenowy, regarding the axp address issue. Is this a #define? I2C addresses are 7 bit (it's more complex, but we'll skip that), but they sent in bits 7-1. Bit 0 is used as a read/write flag to the slave device. So, maybe your value has the shift already added?
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<MoeIcenowy>
wens: on R40 it's called GMAC
<MoeIcenowy>
and in stock kernel device tree compatible it's sunxi-gmac
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<MoeIcenowy>
(in contrast of MII-only MAC sun4i-emac
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<tkaiser>
MoeIcenowy: R40 datasheet clearly differentiates between EMAC (MII) and GMAC (MII/RGMII). BTW: Do you got a newer version than 0.1 of the datasheet in the meantime?
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<MoeIcenowy>
nope.
<MoeIcenowy>
I'm doing development by educated guesses, BSP sources and BSP device trees
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<MoeIcenowy>
BenG83: a linux distro (mix of Android, OpenWRT and Buildroot) by AW
<BenG83>
oO
<tkaiser>
MoeIcenowy: I wouldn't call it distro. It's an attempt to drive 3rd parties crazy. Either kernel 3.4.39 or 3.10.65, tons of vulnerabilities, a build system that produces 'LiveSuit' images in the end. That's nothing anyone outside Allwinner will touch.
<BenG83>
that sounds scary
<MoeIcenowy>
I think at least some people touch it.
<MoeIcenowy>
e.g. Nintendo ;-)
<MoeIcenowy>
and you cannot imagine what can Chinese hardware vendors stand
<tkaiser>
Hmm... I was under the impression that 3rd parties get help here and all the work is been done by AW themselves. But that's just an impression...
<MoeIcenowy>
some people can even use 2.6.35 in 2016 ;-)
<MoeIcenowy>
for them 3.4 is very new, and 3.10 is too new (it even uses a feature called "device tree" that is complex and difficult to learn ;-)
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<BenG83>
Tl talked about AW dropping a 4.2 based BSP
<tkaiser>
MoeIcenowy: Maybe you're right. At least they still support fex and 'compile' it to DT if I understood correctly...
<tkaiser>
BenG83: They said the same for 3.18 before. And it's obvious they don't think about why 'port and forget' is wrong :)
<MoeIcenowy>
I think in the era before 3.4 they at least updated the kernel a bit
<MoeIcenowy>
from 2.6.35 to 3.0 to 3.3 to 3.4
<swabbles>
*sigh*
<swabbles>
gcc 4.9.4 SPL overflow with 2 kiB.
<swabbles>
gcc 5.4.0-r3 SPL overflow with 1.7 kiB.
* swabbles
tries gcc 6.2.
<MoeIcenowy>
swabbles: for which board?
<swabbles>
apritzel's sunxi64-beta branch for Pine64+.
<MoeIcenowy>
64-bit SPL is very easy to overflow...
<swabbles>
I can imagine.
<swabbles>
I hope he will be online soon so that I can poke him about it :).
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<swabbles>
Maybe I am just doing something wrong, or he has already fixed this issue.
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<MoeIcenowy>
ok my r40-wip now supports MMC and USB ;-)
<tkaiser>
MoeIcenowy: Is the GMAC in R40 identical with EMAC in H3/A64/A83T/H5?
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<MoeIcenowy>
not fully identical
<MoeIcenowy>
but mostly identical
<tkaiser>
Different register obfuscation? ;)
<MoeIcenowy>
nope
<MoeIcenowy>
only one register differenece
<MoeIcenowy>
the GETH_CLK_REG register is in CCU on R40, but in syscon on other SoCs
<tkaiser>
MoeIcenowy: So working Ethernet with mainline kernel isn't that far away? :)
<MoeIcenowy>
maybe not too far
<MoeIcenowy>
but I want to do it after dwmac-sun8i being merged
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<apritzel>
swabbles: what's up :-D
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<apritzel>
and yes, I use GCC 6.2
* MoeIcenowy
also use GCC 6.2 and at least didn't face overflow with unchanged code from apritzel
<MoeIcenowy>
SMP is still not available, as I do not know how to do PSCI
<apritzel>
MoeIcenowy: that should be copy&paste from A20, for instance, I guess?
<MoeIcenowy>
To be honest, I know little about ARM
* vagrantc
blinks
* vagrantc
finally got some pine64+ systems into actualy real-world use
<vagrantc>
apparently thanks to someone who knows little about arm
<tkaiser>
MoeIcenowy: Thanks, but not M2U around and not willing to touch the device anytime soon. Dealing with M2+ was already such a waste of time. But will post the link in Armbian forum for unfortunate M2U customers really not happy with instable legacy kernel
<MoeIcenowy>
but it's a pity that M2U is the only R40 device available...
<apritzel>
btw: are there other H5 devices around, or at least planned?
<tkaiser>
MoeIcenowy: True
<MoeIcenowy>
apritzel: Nano Pi NEO2, mentioned above
<tkaiser>
apritzel: and OPi Zero 2
<MoeIcenowy>
slightly hacked the dwmac-sun8i driver, and pray for it to work
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<hramrach>
hello
<hramrach>
what do you use to make teblet screen rotate when the tablet is physically rotated?
<MoeIcenowy>
usually I use fbdev/fbturbo driver's Rotate parameter
<MoeIcenowy>
for X.Org
<hramrach>
what sets the parameter?
<MoeIcenowy>
xorg.conf.d/
<hramrach>
I mean I can rotate the screen just fine. but in android it rotates automagically when you move the tablet
<hramrach>
so what do you use in Linux torotate the screen for you
<MoeIcenowy>
oh it's by accelerometer, but currently no solution is made to rotate it, as fbdev/fbturbo lacks proper Xrandr support
<plaes>
yeah ^^
<hramrach>
and actually it's not xorg.conf.d. xorg.conf.d is AFAIK only read on start or maybe on screen hotplug which is not useful for builtin screen
<hramrach>
I remember why it's broken now. It has that GLS<somenumber> or what it's called touch layer. Which is awesomely flexible so it does something completely different depending on the firmware blob you upload to it
<MoeIcenowy>
GSL?
<MoeIcenowy>
GSL is only a touchscreen controller
<MoeIcenowy>
not a accelerometer
<hramrach>
yes, meaning if it's broken the tablet is pretty useless as a tablet
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<MoeIcenowy>
you broke the firmware only, or you broke the chip?
<hramrach>
I think I used completely broken driver that failed to communicate with the chip at all reflecting on the issues I was seeing.
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<hramrach>
The firmware is uploaded every time the chip is initialized so yo ucannot break that
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<MoeIcenowy>
currently in mainline there's a silead driver.
<hramrach>
yes, I noticed that. Might be worth trying.
<hramrach>
or I can just stick an accelerometer on my desktop screen with double sided tape and use it for testing ;-)
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<hramrach>
It might be even useful application. Few modern desktop screen that can be rotated also have sensor that gives the orientation of the screen.
<tucker>
Anyway, I have a http://linux-sunxi.org/HYH-TBH3 that I'd like to someday use with mainline linux. Anyone who feels up for crafting a dts for it, based on the fex linked from the device page?
<hramrach>
Looks like resurrecting an A13 tablet is worth trying but since no solution for screen rotation exists anyway using desktop screen and discrete acccelerometer board should be good enough for prototyping
<MoeIcenowy>
tucker: do it yourself by learning existing DT ;-)
<hramrach>
iirc there is even a dtc option to read dt from the running kernel
<MoeIcenowy>
but I think the stock kernel of H3 do not use dt
<apritzel>
MoeIcenowy: Theobroma has started dropping sunxi/A64 patches to the u-boot ML
<beeble>
MoeIcenowy: linux-sunxi being subscribe only discourage a bit to CC
<swiftgeek>
g_cdc gadget: CDC Composite Gadget, version: King Kamehameha Day 2008
<swiftgeek>
lol
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<MoeIcenowy>
P.S. do not load several gadget modules at the same time.
<MoeIcenowy>
to load g_cdc please unload other g_*
<swiftgeek>
i loaded some u_ stuff
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<swabbles>
apritzel: OK, good, gcc 6.2 has finished installing so I will try it in a few :).
<apritzel>
swabbles: enjoy ;-) afk for a bit ...
<swabbles>
apritzel: I will test the SPI driver on A64 on Monday btw.
<swabbles>
if I can get your branch to work now :).
<swabbles>
but it does work nicely on the Orange Pi Zero and the A20 OLinuXino Lime2 thus far.
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<nove>
(as in the amlogic case this is also interesting to know), rockchip has been working to mainline their vpu driver from some time already, but what is new (i didn't knew), is that rockchip also released all the sources for their Media Process Platform -> https://github.com/rockchip-linux/mpp
<nove>
not only the sources needed for making the mainline driver, but also all the rest of the sources *without* "license issues"
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<lurchi_>
MoeIcenowy: do you know if codekipper or mylene have a public repository for trying audio codec support on A64?
<MoeIcenowy>
I think there's no
<lurchi_>
MoeIcenowy: too bad, thanks anyway
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<MoeIcenowy>
mripard: can axp_gpio work as interrupt?
<MoeIcenowy>
BPi M2U board uses axp gpio0 as ap6212's interrupt line
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<apritzel>
MoeIcenowy: which AXP is that?
<apritzel>
swabbles: did GCC 6.2 work for you?
<rellla>
nove: seems rockchip is very much ahead now
<rellla>
in thinking about license issues
<apritzel>
MoeIcenowy: it should work: you configure the AXP to trigger an IRQ on a GPIO edge, which will end up on the #NMI pin on the SoC, which is connected to the GIC
<nove>
rellla: is not only rockchip but every soc vendor is now doing something, expect all winner
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<rellla>
nove: it's sad that - iirc - allwinner have been one on the first, that have been told about how it should work better ...