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<_whitenotifier-c>
[Glasgow] marcan commented on issue #96: Level shifter state during reconfiguraiton? - https://git.io/fhPtl
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<emeb>
So one of the things that bugs me about a lot of the FOSS FPGA devboards available is the continued reliance on FTDI USB interfaces.
<emeb>
FTDI chips are expensive (cost more than some of the FPGAs) and all closed up. Plus I've had reliability issues with them (had an FT2232H the suddenly started enumerating as an FT4232)
<daveshah>
emeb: The Mystorm iCE40 boards use a STM32
<emeb>
So I did an STM32F042 that can configure a UP5K over USB. The chip is cheaper than FTDI, source is all open and can be tweaked for stuff.
<emeb>
Plus it's crystal-less and the chip is in a tiny TSSOP20.
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<emeb>
I'm just using a CDC class so it appears like a serial port. Send it simple commands w/ header + bitstream and it manages the configuration locally - host doesn't have to bitbang the CRST, CS, etc.
<emeb>
I'll post code for the host and embedded sides if anyone is interested.
<emeb>
daveshah: Mystorm looks interesting. I did a board a few years ago with a Cortex M4F and a LP4K (or UP5K) on it that had similar features.
<daveshah>
Yeah, it uses a very similar system (basically just cat a bitstream to the serial port)
<tnt>
ftdi is just convenient. for config because it's the same interface as the official boards and so pretty much all tools work with it. And also because it offers a high speed comm to the fpga after config that has existing bindings in so many languages.
<emeb>
Yep. Path of least resistance.
<tnt>
There is an issue open on the icebreaker github with search for suitable replacements but that's not an easy issue.
<_whitenotifier-c>
[Glasgow] marcan commented on issue #96: Level shifter state during reconfiguraiton? - https://git.io/fhPZ4
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<kc8apf>
tinyfpga has their USB bootloader for ice40
<kc8apf>
and their programmer board for MachXO2 is a PIC
<cpresser>
emeb: do you mind sharing the bootloader? I am working on a similar design
<tnt>
kc8apf: none of those provide any kind of high speed link to the host though.
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<anuejn>
emeb: i am highly interested too (building somethin gimiliar with an f070
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<emeb>
cpresser: anuejn: sure. I intend to put the code up in github sometime in the next few days. Would be glad to have some other eyes on it.
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<tinyfpga>
tnt, kc8apf: the EX will have a USBC interface along with 5gbit SERDES routed to it from the FPGA...that could make a Super Speed link....I’ll be giving out an upcoming batch of prototypes for folks to get that working
<tinyfpga>
That will work for any FPGA
<tinyfpga>
board based on the ECP5 5G
<tinyfpga>
Sorry...that was supposed to be a single sentence!
<tnt>
tinyfpga: yeah, right of course, I was referring to the ice40 :p
<tnt>
looking fwd to the campaign :p
<tinyfpga>
tnt: maybe a High Speed UTMI or ULPI USB transceiver chip can be found that’s cheaper than FTDI?
<tinyfpga>
tnt: I haven’t looked at that option myself :/
<tnt>
tinyfpga: but then you're wasting a significant part of the fabric for your host interface.
<tnt>
(and pins)
<tnt>
atm, the plan is some other uc by Nuvoton that have high-speed usb and is cheap and isn't an fx2 :p
<catplant>
you can find some pertty cheap ULPIs
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<cyrozap>
Hey so this isn't 100% relevant but I know some people in here may have relevant experience so I'll ask anyways: If I have an Artix-7 board with two available TX and RX SERDES lanes (currently used for PCIe x2), what would I need to connect it up to a 10 Gb SFP+ module? I assume I'll need some kind of transceiver IC since IIRC the Artix-7 only supports 6.6 Gbps per lane, but I'm not sure exactly what
<cyrozap>
interfaces I'd be converting between.
<cyrozap>
More context: I have an XTRX (https://www.crowdsupply.com/fairwaves/xtrx) and I want to connect to it over 10 GbE since I'm quickly running out of PCIe slots and PCIe switches are both costly and hard-to-find.
<tnt>
but afair you only have 2 serdes on the xtrx
<tnt>
Also does the speed grade they use go up to 6.6G ?
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<tnt>
ouch, the EVM is rather pricey :/
<q3k>
cyrozap: if you only have GTP/6.6 transceiveres then yes, you can only do SFP+ via XAUI and a transceiver like the tlk10031
<q3k>
cyrozap: but you need 8 serdeses at 3.125 to drive xaui
<q3k>
cyrozap: there's also the lower-speed xgmii (which you should be able to drive with normal DDR buffers), but that in turn requires a fuck of signals (32 data bits each way)