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<azonenberg> anybody seen this paper yet?
<azonenberg> just stumbled across this article from last year
<azonenberg> may have applications in EDA, i havent looked at the full paper yet
<azonenberg> just the summary here
<azonenberg> tl;dr graph isomorphism in sub-exponential time
<azonenberg> not polynomial yet, but close enough for most purposes
<DocScrutinizer05> :-)
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<cr1901_modern> azonenberg: Can you route a complicated design on the highest end available Artix in ISE/Vivado Webpack using a single multicore machine?
<cr1901_modern> I know the FPGAs require for ASIC emulation and "millions of gates" require a server farm
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<felix_> you can build the bitstreams of the multiple fpgas in an fpga based asic emulation system on a single server/workstation sequentially. that will take much longer though...
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<azonenberg> cr1901_modern: You can even do a big virtex on a single multicore machine, it'll just take a long time and a lot of ram
<azonenberg> Which is into low millions of gates territory easily
<azonenberg> ise/vivado is incapable of building on a cluster natively
<azonenberg> Giant asic emulators use multiple FPGAs
<azonenberg> You will get best performance using one machine per bitstream to build in parallel, but it will work sequentially
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<azonenberg> All artix devices are available in vivado webpack
<azonenberg> The largest two are available in ISE webpack, they EOL'd ISE before the smaller ones were released otherwise they'd be there
<azonenberg> I have done designs that filled ~1/3 of an xc7a200t on a commodity desktop, it took a while to PAR but it worked fine
<cr1901_modern> "ise/vivado is incapable of building on a cluster natively" Ahh, I thought it was a non-free feature lol
<azonenberg> i have 32GB RAM but 16 should be more than enough
<azonenberg> No
<azonenberg> That is one of the reasons i use splash for antikernel, plus heavy unitized testing
<azonenberg> building one giant bitstream takes forever
<azonenberg> since you cant use a cluster
<azonenberg> building 20 small ones is a lot faster
<azonenberg> on multiple machines
<azonenberg> then you just run on 20 boards and test in parallel
<cr1901_modern> Pity it doesn't run on ARM, and arachne-pnr isn't suited for big FPGAs (assuming that someone added support for a non-ice40 FPGA). Could run it on an RPi or "ARM devboard" cluster.
<cr1901_modern> Pity Xilinx ISE/Vivado*
<azonenberg> a pi cluster would need to be massive to get even remotely close to a single x86's performance
<azonenberg> adding in communications overhead, i'm gonna say 32-64 nodes at best
<cr1901_modern> That bad, huh?
<azonenberg> well a pi has what, 512 MB of RAM?
<azonenberg> you'd need 64 of them just to match the ram of my desktop
<azonenberg> 32 to get 16GB which is what they recommend for larger devices on vivado
<azonenberg> i dont know about CPU performance exactly, but assuming they're ~1 GHz ARM you'd need ~3 ARM cores per x86 core just to get the base clock speed of my desktop
<azonenberg> then allow for the fact that x86 is way more efficient per clock at the same speed
<azonenberg> you're looking at 5-10
<azonenberg> I have four cores so 20-40, add in the impact of hyperthreading and the overhead of communicating between all of those ARMs and 64 soudns like a reasonable number
<azonenberg> even more if the algorithm you're using parallelizes poorly
<cr1901_modern> Well, all of a sudden an ARM cluster doesn't sound all that appealing and is more of a "cutesy" project
<azonenberg> Lol yes
<azonenberg> now, i have things i might use an arm cluster for
<azonenberg> like, for example, parallel unit testing of embedded code
<azonenberg> FPGA build is not something it's good for
<azonenberg> For parallel FPGA build assuming i was using unmodified compilers
<azonenberg> I'd want half a rack or so of 2U microATX boxes
<azonenberg> with a current generation i5 processor probably, or maybe an i7 (have to re-evaluate the bang-for-the-buck range for the latest generation)
<azonenberg> 16-32GB RAM per node
<azonenberg> To save costs and improve reliability make them diskless, boot from a ramdisk image
<azonenberg> that has the compilers on it
<azonenberg> do all of the compiles in ram
<cr1901_modern> So a couple thousand dollars :)?
<azonenberg> If you have empty microATX 2U server cases lying around, like I do
<azonenberg> and old power supplies
<azonenberg> you could probably do it for around 500 USD per node
<azonenberg> the more the merrier
<azonenberg> even one or two would help a lot
<cr1901_modern> Also a nice space heater + electric bill
<azonenberg> This assumes, again, that you have your logic partitioned into multiple bitstreams for an FPGA cluster already
<azonenberg> Lol
<azonenberg> Actually, not so bad
<azonenberg> haswell ( what i have right now) is pretty power efficient
<cr1901_modern> (heat is the main reason I don't really do x86 clusters)
<azonenberg> i'm pulling less than a kW for my desktop, file server, border router, some network switches, and a bit more
<azonenberg> i do not currently have an x86 build server
<azonenberg> when i built my new desktop it was so much faster than the old core2quad and 1st gen i7 systems that i shut them down, too much power
<azonenberg> If i were to do a new deployment it'd be current gen desktop processors in the middle of the speed rangre
<azonenberg> Too low and you waste money on a motherboard not used to its full potential
<azonenberg> too high and you're overpaying for single-node performance at the expense of being able to afford many nodes
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<rqou> hmm did I just miss a giant netsplit?
<nats`> yep
<azonenberg> rqou: i think so
<nats`> [21:34:24] -spb- [Global notice] Apologies for the noise there. We don't seem to be under attack, and should be back to normal now...
<nats`> [21:35:04] -spb- [Global notice] We've put a cloth over the self-destruct button so that nobody pushes it again.
<nats`> -
<nats`> (french time)