00:15 <wpwrak> (sigrok) looks pretty cool

00:25 <kristianpaul> wpwrak: you're right was matter of fixing some naming from guess russian characters for something more utf-8 friendly

00:26 <kristianpaul> the eeschema loading error from yday

00:26 <wpwrak> hah ! :)

00:26 <wpwrak> babylonization is a source of endless fun

00:27 <kristianpaul> ñes !!

00:28 <kristianpaul> dammit i cant not run decently even gnuradio to live decode fm..

00:29 <kristianpaul> thats a good excuse to get and more than two cores laptop.. not now but later perhaps

00:29 <kristianpaul> or better excuse to hack more in to hdl :)

00:54 <qi-bot> [commit] Werner Almesberger: modules/qfp-gen.fpd: further improvements (WIP) (master) http://qi-hw.com/p/kicad-libs/20b7c5f

02:29 <cladamw> wpwrak, can add XOR or like "if" expression under frame ?

02:29 <cladamw> wpwrak, if no, i think it's a good feature to add in the future. :)

02:30 <wpwrak> there are two ways to make an "if":

02:30 <wpwrak> loop if = 1,expr

02:31 <wpwrak> and set ?expr = 1 /* or whatever value would be "true". can also be a string */

02:31 <wpwrak> err, s/?expr/?var

02:31 <wpwrak> if you need an expression, the 2nd form would be:

02:31 <wpwrak> set tmp = expr

02:31 <wpwrak> set ?tmp = value

02:32 <wpwrak> no, wait ...

02:34 <wpwrak> yeah works. looks weird but it's okay.

02:35 <wpwrak> the set ?var = value form needs the latest fped from git. the older loop var = 1, one_or_zero form also works if old versions of fped

02:36 <wpwrak> s/if old/with old

02:36 <qi-bot> wpwrak meant: "the set ?var = value form needs the latest fped from git. the older loop var = 1, one_or_zero form also works with old versions of fped"

02:36 <wpwrak> i think i need some sleep :(

02:39 <cladamw> wpwrak, aha ... tks a lots. need to practice.

03:35 <qi-bot> The build was successful: http://fidelio.qi-hardware.com/~xiangfu/build-nanonote/openwrt-xburst.full_system-20120528-2138

04:06 <qi-bot> [commit] Adam Wang: INFO: clean up by order (master) http://qi-hw.com/p/kicad-libs/e3556ca

04:06 <qi-bot> [commit] Adam Wang: Merge branch 'master' of projects.qi-hardware.com:kicad-libs (master) http://qi-hw.com/p/kicad-libs/8b151f1

04:07 <qi-bot> [commit] Adam Wang: eus.fpd: added new EUS for TI PTH04000WAH footprint (master) http://qi-hw.com/p/kicad-libs/4cc64c9

09:06 <cladamw_> wpwrak, about (if) expression, i saw example from sot.fpd but still don't fully understand how to use two boundaries to 'filter' those pins I don't want to show them.

09:07 <cladamw_> wpwrak, for example I did this: http://projects.qi-hardware.com/index.php/p/kicad-libs/source/tree/master/modules/eus.fpd

09:15 <cladamw_> wpwrak, there's pin 5 and 6 are not in proper order same as pins_bottom frame, (i.e. a spindle coordinates pins vectors), I've tried to learned to disable ( i.e. multiply by an index) pin 6, 7 vectors but not in success though. In the end, I used a very stupid way to split two quadrants individually then finished. :-) The codes are not smart at all. So if you have available time, could you show me an alternative codes by

09:15 <cladamw_> using "if" expression to optimize codes ? :-O

09:18 <cladamw_> i've been loving your this Fped, it's not about efficiency to help work or not, it's about to apply/scrap math together from schools. :-)

11:39 <xiangfu> jivs, from the build host also failed to build guile2 :(

15:55 <qi-bot> ¦é¸¹éÕ

15:59 <wpwrak> "death rattle" ?

16:07 <qi-bot> [commit] Werner Almesberger: ircstat/ML: April 2012 figures (belatedly - forgot to commit) (master) http://qi-hw.com/p/wernermisc/bd8c84d

16:07 <qi-bot> [commit] Werner Almesberger: ircstat/stat: move source file and filter to a variable (master) http://qi-hw.com/p/wernermisc/70b01eb

16:07 <qi-bot> [commit] Werner Almesberger: separate dumping of hierchy rules from dumping of fields (master) http://qi-hw.com/p/eda-tools/b6a4a80

16:07 <qi-bot> [commit] Werner Almesberger: new option -N to override file names in diagnostics (for regression testing) (master) http://qi-hw.com/p/eda-tools/60de30c

16:07 <qi-bot> [commit] Werner Almesberger: add regression test infrastructure (master) http://qi-hw.com/p/eda-tools/88ad25e

16:07 <qi-bot> [commit] Werner Almesberger: test/hierfld: field definitions in hierarchy (master) http://qi-hw.com/p/eda-tools/c24da02

16:07 <qi-bot> [commit] Werner Almesberger: new option -v to control verbosity level; move hierarchy dump from parser to boom.c (master) http://qi-hw.com/p/eda-tools/59d21e6

18:52 <whitequark> can I ask a question about cpus/fpgas?

18:53 <Ayla> you may

18:54 <whitequark> let there be an ARM and an FPGA

18:54 <whitequark> FPGA sits on ARM's external bus

18:54 <whitequark> ARM's bus controller is technically external, but it's clocked by the same signal as the FPGA

18:54 <whitequark> can bus be used as a synchronous one from within the FPGA

18:54 <whitequark> *?

19:01 <whitequark> erm

19:01 <whitequark> s,technically external,technically asynchronous,

20:14 <larsc> whitequark: what do you mean by technically asynchronous

20:14 <larsc> ?

20:36 <kristianpaul> clocked but this actually mean same bus speed i guess

20:37 <kristianpaul> or... ?

20:38 <kristianpaul> whitequark: you could implemented a dual ported stam on the fpga that "wires" to arm bus i guess support slave memory interface

20:39 <kristianpaul> well but that wasnt a good asnwer to your question :)