<houkime>
u608 u609 using a NeoFeet footprint with wrong pin count on v2 layout branch.
<houkime>
model code is identical except several last digits (simple mistake?)
<houkime>
U203: renamed pin E to pin 25 for correct fp linkage.
<Joerg-Neo900>
U608/9 I can't comment
<Joerg-Neo900>
schematics rule
<houkime>
you mean that it is generally better to change naming on fp than on sch?
<Joerg-Neo900>
err yes, if feasible, but I think a pin 2E" doesn'T work on footprints.
<Joerg-Neo900>
I meant >> SN74AUP1G74DQE X2SON (8) 1.40 mm × 1.00 mm<<
<Joerg-Neo900>
if the schematics state SN74AUP1G74DQE and the pins in schematic do not match that footprint, we made a oopsie, otherwise the footprint is the one to get fixed
<houkime>
ok
<Joerg-Neo900>
if the schematics state SN74AUP1G74DQE and the pins in schematic do not match that footprint as shown in datasheet, we made a oopsie, otherwise the footprint is the one to get fixed
<Joerg-Neo900>
dang >>...otherwise the KiCad footprint is the one to get fixed<<
<houkime>
it seems like a footprint is for another model. rechecking stuff.
<Joerg-Neo900>
you noticed you can invoke datasheet and often (manuf) footprint from eeshow?
<houkime>
this function is broken at least on my build.
<Joerg-Neo900>
DCU, DQE and YFP YZP packages share same pin numbers and functions, only RSE package footprint differs
<Joerg-Neo900>
you need to invoke via `,ake view`
<Joerg-Neo900>
you need to invoke via `make view`
<Joerg-Neo900>
make job will download all the datasheets for you
<houkime>
ok, my mistake in packaging. Need to add wget to deps
<houkime>
now works.
<Joerg-Neo900>
:-)
<Joerg-Neo900>
did all downloads work or are there dangling URLs again?
<Joerg-Neo900>
this is a running PITA to maintain, but hardly fixable to avoid violating copyright issues
<Joerg-Neo900>
I'd guess Silego won't work anymore even with my "smart" lil job I created for the SLG46* chips
<houkime>
don't know. It seems like it should download stuff only on the first time and now it downloads only on request.
<houkime>
Hope if they are identical they won't provoke merge conflicts.
<houkime>
although i could just gitignore getsilego
<houkime>
hmmm.
<Joerg-Neo900>
you just don't need to git-add it before pushing
<houkime>
ok
<Joerg-Neo900>
and git-stash it before next pull
<Joerg-Neo900>
hmm maybe git ignore is convenient for now, as an interim solution
<Joerg-Neo900>
did I mention I hate git?
<Joerg-Neo900>
;-O
<Joerg-Neo900>
;-P even
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<houkime>
For now worst trouble I get is that IDK how to check last modified filestamps from CLI. Seems like it is mosty a feature of hubs.
<houkime>
adding getsilego to gitignore since i like to "add -A"
<houkime>
5 commits ahead of the rest of you for now.
<houkime>
2 more problematic footprints and pcb will be finally synced with sch fp-wise (except for extra fps on board).
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<houkime>
connectors in b2b lower-upper, "just a collectionof signals", are they real connectors or they are virtual?
<houkime>
look like real. ok
<houkime>
ok,that board connector-matching part wasn't in v1 obviously. and metacollin haven't really do anything with them yet.
<houkime>
aand ther's not much space for them with his incremetally growing layout approach. Guess I need to do all the hard work.
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<houkime>
The fun part is that UPPER was never really designed AND it needs to have cpu and memories and tons of stuff. So one needs to place connectors on LOWER with some freedom allowed otherwise routing of UPPER wight get impossible.
<houkime>
in post-v2 designs.
<Joerg-Neo900>
yep
<Joerg-Neo900>
that's indeed a relevant aspect
<Joerg-Neo900>
note that UPPER has other restrictions regarding where to place CPU for example
<Joerg-Neo900>
those are created by the shape and form of the metal of screen slider mechanism
<houkime>
In a bad case we might need to have more but smaller connectors. Will see.
<Joerg-Neo900>
this is a viable option
<Joerg-Neo900>
I even pondered alternatives like flex cable and zebra strips
<Joerg-Neo900>
the latter is a nogo, for mere contacts per area they offer
<Joerg-Neo900>
embedded flex cable like in N900 might be a last resort alternative when we can't find the space for B2B conns
<Joerg-Neo900>
edge-soldered flex cable another one
<Joerg-Neo900>
where "edge" may also be the edge of a slot in UPPER and/or LOWER
<Joerg-Neo900>
last time I did a calculation iirc we had ~70% density, with a minimal courtyard around components
<Joerg-Neo900>
though based on a arbitrary guestimate constant assumed for each low pincount birdseed component
<Joerg-Neo900>
maybe we should use a fullsize (like UPPER and LOWER) flex PCB populated with components to connect UPPER to LOWER, thus turning the sandwich into a sandwich with salami ;-D