sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<mtrbot-ml_> [mattermost] <astro> @sb10q while crashes are fixed on the cora, the zc706 is running but eth is not working... is its serial connected to nixbld?
<mtrbot-ml_> [mattermost] <astro> wait, tcp works but icmp doesn't? I think I need sleep now...
<mtrbot-ml_> [mattermost] <sb10q> Serial isn't connected
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<ZirconiumX> whitequark: When implementing DDR do I need to flop each gear?
<whitequark> what do you mean?
<ZirconiumX> e.g. if there's pin.o0 and pin.o1, do both need a DFF?
<whitequark> how are you implementing DDR exactly?
<ZirconiumX> The altddio megafunction
<ZirconiumX> Since it doesn't really give you a choice there
<whitequark> that should include the flops in most cases
<whitequark> the i1 one is the only that can be problematic
<whitequark> depends on whether the negedge output of altddio has a full cycle of hold period or not
<ZirconiumX> Not sure
<ZirconiumX> This reference is 9 years old, so I'm expecting bugs
<Dar1us> that makes it vintage
<ZirconiumX> So, the altddio_out cell has an option for whether to register the output-enable. What should it be set to?
<ZirconiumX> I registered the altiobuf output-enable in SDR, so I'm assuming I should do it in DDR too?
<whitequark> yeah
<_whitenotifier> [nmigen] ZirconiumX synchronize pull request #221: vendor.altera: use buffer primitives - https://git.io/JesUg
<ZirconiumX> whitequark: It seems there is no differential mode for altddio. Should I just leave it, or do we need to fabricate it?
<whitequark> hm
<whitequark> are you sure there isn't?
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/591057243?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing fdb9937...bc4996f - https://codecov.io/gh/m-labs/nmigen/compare/fdb99379db2719d8af35115adc38d9b4da0d6b5c...bc4996fe297f09d47dd616a1d2cedbd26a4bf115
<ZirconiumX> There are three different cells for DDR input; altddio_{in,out,bidir} and they only take one pin
<ZirconiumX> whitequark: ^
<_whitenotifier> [nmigen] Success. 82.34% remains the same compared to fdb9937 - https://codecov.io/gh/m-labs/nmigen/compare/fdb99379db2719d8af35115adc38d9b4da0d6b5c...bc4996fe297f09d47dd616a1d2cedbd26a4bf115
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/591057243?utm_source=github_status&utm_medium=notification
<daveshah> Usually the differential buffer is separate from the DDR buffer
<daveshah> so the DDR provides one input/output and the differential one has two pins
<ZirconiumX> That makes sense
<ZirconiumX> But makes my life a little awkward :P
<ZirconiumX> Because altiobuf does have a differential mode
<ZirconiumX> So I guess I need to chain altiobuf and altddio, then?
<daveshah> That would be my guess, based on how other FPGAs do it
<ZirconiumX> Right, thank you
<daveshah> e.g. on Xilinx one would chain IBUFDS and IDDR for example
<ZirconiumX> I'll get back to work after I finish my coffee
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<_whitenotifier> [nmigen] ZirconiumX synchronize pull request #221: vendor.altera: use buffer primitives - https://git.io/JesUg
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/591070707?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing fdb9937...95d5ca5 - https://codecov.io/gh/m-labs/nmigen/compare/fdb99379db2719d8af35115adc38d9b4da0d6b5c...95d5ca5b1ccce54373f726bf2252a1a63816ce2b
<_whitenotifier> [nmigen] Success. 82.34% remains the same compared to fdb9937 - https://codecov.io/gh/m-labs/nmigen/compare/fdb99379db2719d8af35115adc38d9b4da0d6b5c...95d5ca5b1ccce54373f726bf2252a1a63816ce2b
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/591070707?utm_source=github_status&utm_medium=notification
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<ZirconiumX> daveshah: If I need to chain altiobuf with altddio for differential I/O, should I also do it for single-ended I/O?
<daveshah> Probably not otherwise needed
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<mtrbot-ml_> [mattermost] <sb10q> @astro you can access the development boards from gdb using commands like `target remote | openocd -c "gdb_port pipe; log_output openocd.log" -f zc706.cfg`
<mtrbot-ml_> [mattermost] <sb10q> the TCP port isn't nice when there are multiple users/boards...
<_whitenotifier> [nmigen] emilazy opened issue #240: Mux(<bool>, a, b) throws TypeError - https://git.io/JeZjf
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<_whitenotifier> [nmigen] jfng opened pull request #241: rpc: add public Records as module ports. - https://git.io/JenJn
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<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/591243229?utm_source=github_status&utm_medium=notification
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