sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub108> [artiq] sbourdeauducq commented on issue #829: We don't track changes to influxdb. I'd recommend using the version that was current when the ARTIQ code was committed and test it, you can then submit a documentation patch. If you need support for other influxdb versions, we can do it for you on a contract basis (we currently have no other plans for this). https://github.com/m-labs/artiq/issues/829#issuecomment-328700556
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<GitHub138> [artiq] jordens commented on issue #829: The influx wire format is pretty stable. I'd guess it'll work fine with the latest releases. Last I checked it was still working. Please give it a try and report back. https://github.com/m-labs/artiq/issues/829#issuecomment-328756710
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<rjo1> larsc: too much without the termination? likely yes.
<rjo1> larsc: i'd think the ipedance is 100 diff. according to greg it looks good whith termination https://github.com/m-labs/sinara/issues/216
<larsc> ok
<sb0> _florent_, what did you change to get SERDESPLLLOCK=1 on the DAC?
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<_florent_> sb0: nothing, one DAC is working, the other not
<sb0> you just tried with just 4 lanes?
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<larsc> the number of lanes should not affect the PLL lock status
<rjo1> larsc: it may indirectly in our case. by using less power on shaky power supplies.
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<GitHub113> [artiq] sbourdeauducq pushed 1 new commit to rtio-sed: https://github.com/m-labs/artiq/commit/bdd96084c59b5f51daebc7137d40aa653aa41b18
<GitHub113> artiq/rtio-sed bdd9608 Sebastien Bourdeauducq: rtio/sed: add lane distributor (untested)
<larsc> you triggered something... the lanes on my boards start failing
<rjo1> what?
<larsc> things worked fine until I started discussing clock problems with you ;)
<rjo1> larsc: ;)
<rjo1> _florent_: good work today! are you implementing the same changes that greg has (bridging the PS and terminating the clock)? and is greg playing with the preemphasis or are you?
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<GitHub26> [artiq] amhankin commented on issue #829: It may take a few weeks, but I will let you know what happens with the latest stable version of influxdb v1.3 after testing it. https://github.com/m-labs/artiq/issues/829#issuecomment-328940152
<travis-ci> batonius/smoltcp#67 (socket_ref - 51f545c : Egor Karavaev): The build passed.
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<_florent_> rjo: I've played a little bit with preemphasis but haven't seen real improvements, but that's still interesting to let greg play with that, maybe he'll see something
<rjo> _florent_: could you ask him directly or do you want me to do that?
<travis-ci> batonius/smoltcp#68 (socket_ref - c3f534f : Egor Karavaev): The build passed.
<rjo> _florent_: that was with the hardware fixes or without?
<GitHub62> [smoltcp] batonius opened issue #41: The server example panics after sending 9Mb from 6972 https://git.io/v5Dlu
<travis-ci> batonius/smoltcp#69 (socket_ref - 3f56112 : Egor Karavaev): The build passed.
<travis-ci> batonius/smoltcp#70 (socket_ref - 2b701e5 : Egor Karavaev): The build was broken.
<GitHub41> [smoltcp] batonius opened pull request #42: Use smart pointers in SocketSet's API (master...socket_ref) https://git.io/v5Dw7
<_florent_> rjo: I tested without the hardware fixes
<_florent_> rjo: greg said he was going to play with preemphasis so I think he will post results on the github issue
<GitHub169> [smoltcp] batonius commented on pull request #42 8502574: It's possible I'm missing something here: I want to prevent a spurious destructor call, but I can't use `mem::forget` since `socket_ref` is being borrowed from until the end of the method. It doesn't prevent the destructor from being called tho, so I have to do it by hand. https://git.io/v5DKn
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