sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<_florent_>
rjo: ok I'll put the code here when I'll be more advanced. For now I'm working on the JESD204b layers from Transport & Data link layer. I'd like to have it done by the end of next week
<sb0>
_florent_, do you need a 8b10b encoder?
<rjo>
let's use the ones in the transcievers for that.
<sb0>
there's absolutely no logic in 8b10b. you never take into account the running disparity for balanced 3b4b codes, except when it's D.x.3, because why not
<sb0>
did they design this by brute-forcing all possible codes and then made up some vague rules afterwards or what
<sb0>
the bits are also labeled "a, b, c, d, e, i, f, g, h, j", in that order, just to add to the confusion I suppose
<sb0>
in the 5b6b there's the same exception for D.07
<sb0>
what the hell
<sb0>
ah, there's a reason for those two exceptions in the paper.
<_florent_>
sb0: yes we need 8b/10b for JESD
<_florent_>
sb0: I think we should try to share all the transceiver stuff between JESD and your communication stuff
<sb0>
I have all the elastic buffers disabled... don't you need them for JESD?
<sb0>
my code is disabling most of the transceiver features, not just because they're cruft, but also because I need control over the latency. the JESD core has different constraints...
<sb0>
elastic buffers are implementable in fabric though
<_florent_>
ok, for the JESD, do you want 8b/10b to be implemented in fabric or just use the ones in the transceivers?
<_florent_>
if in fabric then we can share at least that
<larsc>
the elastic buffer in the transceiver is not elastic enough for JESD
<larsc>
at least if you want subclass 1 or 2
<larsc>
in jesd204b sysref is used to control latency and to compenstate for any (potential) non-deterministic properties of the tranceier and transmission lines
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<sb0>
larsc, yes, but it may simplify any required clock domain crossing inside the FPGA. yes, it adds non-deterministic transceiver latency, but as you point out, the receiver is supposed to deal with that
<sb0>
I should be done with the 8b10b encoder soon, and it should support parallel encoding of many words at high clock rates
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