sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0> whitequark, something similar to python asyncio
<sb0> what exactly do you have questions about?
<whitequark> no, I mean concrete example of end application
<sb0> what the runtime currently does
<whitequark> I mean, there's clearly something that's hard to implement in C, which is why we're doing it
<whitequark> what is it?
<sb0> handling the multiple TCP connections cleanly
<whitequark> okay.
<whitequark> I'm halfway done with a decent coroutine library
<sb0> and if we do complicated multi-experiment scheduling that involve the core device (e.g. preloading kernels) it'll get much worse
<sb0> good. then that should talk to the lwip zero-copy TCP API (which we are currently using), to the kernel CPU (mailbox), and timers (for e.g. watchdogs)
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<sb0> sigh xilinx... they invert sfp tx_disable on the kc705 and still call it tx_disable
<GitHub48> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/vKzH9
<GitHub48> migen/master 5b1df78 Sebastien Bourdeauducq: platforms/kc705: add SFP pins
<bb-m-labs> build #79 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/79
<bb-m-labs> build #112 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/112
<bb-m-labs> build #550 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/550
<bb-m-labs> build #265 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/265
<bb-m-labs> build #824 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/824
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<FelixVi> hi, is anybody here familiar with openocd based programming of spi flash?
<rjo> yes
<FelixVi> ah, can I ask you a question about programming a xc6slx45?
<FelixVi> I can configure the fpga with bit files
<FelixVi> but writing to the spi flash fails
<FelixVi> it tells me that enable write to flash failed
<rjo> what commands?
<FelixVi> I am using the bscan_spi bit files that robert has on github
<FelixVi> flash write_image erase $bin $addr
<FelixVi> that's the one that fails
<FelixVi> I'm calling init; jtagspi_init 0 bscan_spi_xc6slx45.bit; jtagspi_program mybin.bin 0;
<rjo> don't use flash write_image.
<FelixVi> that's what jtagspi_program calls
<rjo> full command and output please.
<FelixVi> > init
<FelixVi> > jtagspi_init 0 bscan_spi_xc6slx45.bit
<FelixVi> loaded file bscan_spi_xc6slx45.bit to pld device 0 in 0s 147102us
<FelixVi> Found flash device 'micron n25q128' (ID 0x0018ba20)
<FelixVi> JTAG tap: xc6s.tap tap/device found: 0x34008093 (mfg: 0x049 (Xilinx), part: 0x4008, ver: 0x3)
<FelixVi> flash 'jtagspi' found at 0x00000000
<FelixVi> > jtagspi_program waxwing_P5_P7_blink_main.bin 0
<FelixVi> auto erase enabled
<FelixVi> Found flash device 'micron n25q128' (ID 0x0018ba20)
<FelixVi> Found flash device 'micron n25q128' (ID 0x0018ba20)
<FelixVi> Found flash device 'micron n25q128' (ID 0x0018ba20)
<FelixVi> sector 0 took 218 ms
<FelixVi> sector 1 took 214 ms
<FelixVi> sector 2 took 239 ms
<FelixVi> sector 3 took 248 ms
<FelixVi> sector 4 took 248 ms
<FelixVi> sector 5 took 249 ms
<FelixVi> sector 6 took 247 ms
<FelixVi> sector 7 took 252 ms
<FelixVi> sector 8 took 253 ms
<FelixVi> sector 9 took 251 ms
<FelixVi> sector 10 took 250 ms
<cr1901_modern> try the bin file?
<FelixVi> sector 11 took 245 ms
<FelixVi> sector 12 took 251 ms
<FelixVi> sector 13 took 245 ms
<FelixVi> sector 14 took 251 ms
<FelixVi> sector 15 took 244 ms
<FelixVi> sector 16 took 248 ms
<FelixVi> sector 17 took 251 ms
<FelixVi> sector 18 took 246 ms
<FelixVi> sector 19 took 247 ms
<FelixVi> sector 20 took 247 ms
<rjo> come on use pastebin
<FelixVi> sector 21 took 247 ms
<FelixVi> sector 22 took 244 ms
<FelixVi> Cannot enable write to flash. Status=0x00000000
<FelixVi> page write error
<FelixVi> error writing to flash at address 0x00000000 at offset 0x00000000
<FelixVi> the bit file is fine, from there I used promgen to generate the bin
<altker128> Can you paste each bit of the bitfile here in the IRC channel for us to look at?
<FelixVi> yes, give me a second
<altker128> That's a joke
<altker128> Please don't do that.
<FelixVi> ascii or binary?
<FelixVi> :)
<FelixVi> well, sry - I figured 20 lines is still OK
<FelixVi> hmm, I'm starting to wonder about the micron flash - and if that's causing any trouble
<FelixVi> programming flash on a papilio pro worked fine
<rjo> it means what it says: your flash chip did not like being write enabled. maybe its broken.
<rjo> certainly if that always happpens at sector 23.
<rjo> otherwise could be bad wiring in any kind of way.
<FelixVi> it does -.-
<FelixVi> I can program it just fine with a xilinx programmer
<FelixVi> so that's a bit weird
<FelixVi> is it really in sector 23? I am a little confused about that
<FelixVi> it says address 0x00 and offset 0x00
<altker128> Could be a cabling issue
<FelixVi> so that's not in sector 0?
<rjo> the entire operation failed.
<FelixVi> hmm, I'll check the cable
<FelixVi> but jtag configuration of the fpga works fine
<FelixVi> and that's going through the same cable
<FelixVi> pin configuration for the spi flash is right in the bscan script
<rjo> try a slower jtag frequency
<FelixVi> ah - that could be it
<altker128> What board is this BTW?
<FelixVi> that gives me the same error
<FelixVi> it's a waxwing board - like the pipistrello basically
<FelixVi> hmm, seems like there's something about the configuration that is not liked
<FelixVi> any jtag frequency fails
<altker128> Can you scope it?
<FelixVi> yeah, I might have to do that at work
<FelixVi> on page 13, the spi connections look weird
<FelixVi> why would W_bar not be connected?
<FelixVi> maybe that's the problem here
<altker128> RZQ is also not right, heh
<FelixVi> well, the papilio pro has the same connections and that's working
<altker128> FelixVi: At least the ~W is on a resistor so you can solder to it
<FelixVi> so that means back to the flash chip itself
<FelixVi> yeah, that'll help :)
<FelixVi> how does openocd know that the write enable was successful?
<altker128> No idea. Why aren't you using Xilinx Impact?
<altker128> That can program SPI flash parts too
<FelixVi> because the boards need to reprogrammed via usb
<FelixVi> so I put a ft2232h on them and use the second channel for programming
<altker128> Maybe it's a signal integrity issue
<altker128> Or a operating voltage issue
<altker128> Anyway, I gotta run
<FelixVi> supply is 3V3 according to the schematic
<altker128> best of luck
<FelixVi> thanks for the help!
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<FelixVi> hmm, I'm really puzzled about this
<FelixVi> flash erase_sector doesn't give me any errors
<FelixVi> well, doesn't look like there's an easy fix to this
<FelixVi> thanks for the help!
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