Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<techping> does someone know how to calibrate the a83t's dram controller?
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<techping> i want to find optimal dram setting for my uboot
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<MoeIcenowy> wens: thanks for nmi patchset renew
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<MoeIcenowy> montjoie: which chip did you use for http://sunxi.montjoie.ovh/ sun4i-ss benchmark?
<montjoie> cubieboard2
<montjoie> but numbers must be updated
<montjoie> I need to compare with libkcapi speed test also
<montjoie> aka bebcn numbers are old
<montjoie> bench
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<MoeIcenowy> P.S. maybe you should also add a benchmark that does the algorithms totally in userspace
<MoeIcenowy> as the context switch is also a hugh performance cost
<montjoie> the bench is in userspace
<montjoie> with my cryptotest tool
<MoeIcenowy> I mean that do a software algorithm in userspace
<montjoie> no it use the kernel crypto from user space via AF_ALG/cryptodev
<montjoie> and compare with non-hardware algo
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<montjoie> but yeah the same with pure userspace could be added as a third column
<MoeIcenowy> it will show that whether is it worth to call the sun4i-ss in user programs ;-)
<MoeIcenowy> s/that whether/whether/
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<montjoie> spoiler: "not the worth"
<montjoie> or few
<montjoie> for sun8i-ce its not for the worth at all:)
<MoeIcenowy> sun8i-ce is even slower than sun4i-ss?
<MoeIcenowy> or it's because SoCs with sun8i-ce has better CPU than sun4i-ss?
<montjoie> good question, perhaps a sort of all answer
<montjoie> perhaps its DMA
<montjoie> sun4i-ss with DMA is unusable
<montjoie> perf/10
<KotCzarny> maybe do a test while cpuburn is running at the same time?
<montjoie> it is why I never submitted DMA patch for it
<KotCzarny> it could be a nice comparison if it actually offloads cpu
<montjoie> sun8i-ce perf rise with buffer size
<montjoie> but
<montjoie> crypto is always on small size
<montjoie> typical usage disk encryption (512)
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<montjoie> sun8i-ce become cool > 4096
<montjoie> KotCzarny: I will try
<KotCzarny> and compare with similarly loaded soft-only
<KotCzarny> or as if you have mentioned, maybe real usage test in disk encryption
<montjoie> since SS/CE doesnt do XTS, it will always be outperformed
<montjoie> I need to recheck the people trying to patch dmcrypt and co to accept buffer of "not 512"
<montjoie> when fs sector will be up to 4096, hardware crypto will rock
<montjoie> anyway I note on TODO "redo bench"
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<montjoie> mini bench for fun https://pastebin.com/8WXnSV1x
<montjoie> but some numbers are strange (why pine64 is lower than H3 for generic aes)
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<KotCzarny> different distro compilation options?
<montjoie> gentoo nearly same CFLAGS (appart from 32 vs 64)
<montjoie> oh no aes-arm on my pine64
<KotCzarny> it looks like it's almost exactly halved
<KotCzarny> maybedoes it use multicore?
<KotCzarny> ahm. a64 is quad core too. then its not that
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<wens> AHB bus speeds?
<wens> or mod clock speeds?
<wens> montjoie: I don't think we'll be able to apply any more h3/a64 patches until the sun8i-dwmac device tree patches are dropped from net-next
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<montjoie> wens: tried to overclock some clock, no real change
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<parobalth> I have noticed that the Device page for NextThings C.H.I.P. v1.0 (http://linux-sunxi.org/NextThingCo_CHIP) is empty. I own a device and plan to fill the wiki page with information. Is anybody else working on it?
<parobalth> So far I have built mainline U-Boot with "CHIP_defconfig". Is there also a CHIP-defconfig for Sunxi U-Boot? I am asking because I try to understand UBI and NAND support regarding Chip.
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<montjoie> wens: bus-ce is the same on H3/A64
<montjoie> wens: at least the A83T DT could be merged in mripard tree
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<wens> parobalth: go ahead with the wiki
<wens> parobalth: there is no separate sunxi u-boot
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<MoeIcenowy> mripard: maybe use NextThingCo/CHIP-u-boot now is better?
<mripard> yep
<mripard> NAND will not work on mainline U-Boot for the CHIP
<mripard> (but does for the CHIP Pro)
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<mupuf> Hey guys. I have been experiencing something odd with my chip's GPIOs.
<mupuf> It would seem like I am tripping the circuit protection of the R8 with just my 10k pull down resistor. 27k works
<mupuf> I tested this through the sysfs interface, just setting the gpio's direction to output, and then setting the value to 1, I get 3.3V for 3.5us and then it decays back to 0 very quickly
<mupuf> the 27kohm resistor works (22 kohm does not)
<mupuf> The spec says that the drive strength should be 10mA, but I am at 330uA with the 10k resistor
<mripard> mupuf: on which GPIOs is it? the XIO's or the others ?
<mupuf> yes, the XIO
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<mupuf> With paulk, we tried to increase the drive strength to 40mA, but either we failed at it or it just had no effect.
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<mupuf> So, have you seen such behaviour before? Any idea what else I should try?
<mripard> I know there was something about them that confused me at first
<mupuf> otherwise, where should I file a bug?
<mupuf> hehe. Well, at least, it has this behaviour on all my CHIPs
<mripard> these are open-drain GPIOs
<mupuf> (4), so it is consistent
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<mripard> so iirc, the switch is not on the + side, but on the ground
<mripard> so a value of 1 means that the voltage is 0
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<mupuf> hmm, from what I have seen, there is at least an internal pull up then
<mripard> (god, I suck at electronics)
<mupuf> because setting the gpio to 1 definitely gets me 3.3V
* mupuf would have expected a normal CMOS logic, but even open drain works for me
<mripard> there might be a pull-up yes
<mripard> have you looked at the (i2c) chip datasheet ?
<mupuf> no, no idea where to search for this
<mupuf> so, XIO gpios are exposed through an internal/external i2c chip?
<mripard> yes, XIO pins are connected to a GPIO expander on I2C
<mripard> all the other come from the SoC directly
<mupuf> ok, so that may explain
<mripard> this is the I2C chip datasheet
<mupuf> thanks, checking it out!
<mupuf> input/output clamp current: +/- 400 uA
<mupuf> well, that sounds like it is close to what I do
<mupuf> so, it is plausible
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<mupuf> hmm, we are supposed to be able to drive LEDs directly with the XIO, which means ~20mA at least
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<mupuf> ok, got it
<mripard> I know I did it in the past
<mripard> but you have to set them up backwards
<mupuf> In a gist: they can handle sinking 40mA
<mupuf> but they only provide up to 100uA of source current
<mupuf> that is a bummer :D
<mupuf> because in my design, I can't do anything else but what I have. I guess it is good I ordered 100k resistors then!
<mupuf> mripard: thanks for the info!
<MoeIcenowy> mripard: because of SLC mode?
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<mripard> MoeIcenowy: yes
<mripard> not SLC mode
<mripard> it is an SLC NAND
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<MoeIcenowy> I mean the problem on original CHIP is SLC mode?
<MoeIcenowy> P.S. raw NAND with mainline kernels still seems too quirky now...
<mripard> MoeIcenowy: the original CHIP has an MLC NAND
<MoeIcenowy> I know
<MoeIcenowy> but I think mainline U-Boot can now support MLC?
<mripard> no
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<MoeIcenowy> at least correctly read out its parameters
<mripard> oh, yes
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<mripard> but the point of a storage device is to store data reliably
<mripard> which isn't the case with MLC
<MoeIcenowy> yes...
<MoeIcenowy> U-Boot UBI code still doesn't have MLC optimization?
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<mripard> it's not just U-Boot, it's Linux as well
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<wens> things seem to be moving slowly on that front
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<icecream> Hello, I've got some issues with a Wifi USB adapter not being recognized by a H3 based board (nanopi). I've confirmed that the USB port works with other adapters and that the adapter itself also works by putting it into two other computers. This is the dmesg output http://paste.ubuntu.com/24794404/ and this the lsusb output http://paste.ubuntu.com/24794410/. I've got no clue why it's not working, the driver is also loaded.
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<[TheBug]> um
<[TheBug]> when the driver loaded
<[TheBug]> what di dmesg show?
<[TheBug]> did*
<[TheBug]> can you put that in a pastebin as well
<[TheBug]> that will probably provide more information about the issue that an lsusb
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<[TheBug]> icecream
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<icecream> Yes, one moment.
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<montjoie> MoeIcenowy: I test my m2ultra and I see no emac node in your patch series:)
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<[TheBug]> icecream: one moment seems like hours... glad I didn't wait around for ya
<pmpp> he melted
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<parobalth> mripard, MoeIcenowy, wens: Thank you! Your replies help me a lot!
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<[TheBug]> icecream: I had missed your dmesg but it may be having issues powering the USB if you are using USB power through OTG then either bad/cheap cable or power supply is not putting out 5V2.1A as it should
<[TheBug]> so it seem to cycle power modes?
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