Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
<nove> for the gratis software community is too much to ask for the conditions in which one would not get involved in "license-issues"
<nove> and this is the result
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<ssvb> apritzel, jemk: I have added some notes to the wiki, but will try to work on the actual conversion tool only tomorrow
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<wens> montjoie: just updated that branch, should work
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<wens> MoeIcenowy: which R_CCU / chip specifically?
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<wens> hah, stupid me, forgot to commit and push the R40 PSCI stuff
<MoeIcenowy> wens: the most critical one is A64
<MoeIcenowy> as legacy r clock support dts patch is denied for it
<wens> no secure sram on r40 :/
<MoeIcenowy> to think something good: no PRCM on R40
<MoeIcenowy> (is it really good?
<wens> it's good that you don't have to mess around with something undocumented
<wens> every register and bit that SMP bring up needs is documented
<MoeIcenowy> wens: should I prepare for a big full R_CCU driver or just do an A64/H3 one currently?
<wens> "big full" as in everything defined for all platforms?
<MoeIcenowy> at least reserved
<MoeIcenowy> I think the most clocks are the ones in A80 merge with the ones in A31
<MoeIcenowy> or we may better make A80 PRCM a dedicated driver, as it have too many extra things ;-)
<MoeIcenowy> on A80 even things like I2S and PS/2 is in CPUs...
<MoeIcenowy> Thus the A31 one will be the most -- but for other SoCs we need to replace P2WI with RSB except H3 which have that bit not used ;-)
<wens> you mean leave holes in the clock/reset indexes?
<wens> that would make it easier to merge the drivers I suppose
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<MoeIcenowy> I will leave hole for all clocks on A31 (a superset of all other SoCs
<wens> i guess that would work
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<MoeIcenowy> and for A31 we may create a different clock or we just name the clock CLK_BUS_RSB_P2WI?
<MoeIcenowy> but even if we split to CLK_BUS_RSB and CLK_BUS_P2WI we will assign the same number to it
<MoeIcenowy> s/we will/I will/
<wens> split is better
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<MoeIcenowy> P.S. There's infomation about TV decoder in R40 manual
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<wens> it can only do SDTV though
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<wens> R40 now has working SPL + PSCI
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<plaes> MoeIcenowy: nice.. cover letter :)
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<reev> Hey I have some issue regarding orange pi zero wifi, can I ask here?
<KotCzarny> see topic, dont ask to ask
<KotCzarny> just ask
<BenG83__PB> fwiw, Tl got A64 BSP v3 with 4.4 source http://wiki.pine64.org/index.php/Pine_A64_Software_Release#Linux_BSP_3.0.2C_kernel_ver_4.4
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<reev> okay
<reev> I am trying to bring wlan0 interface up but it is still showing down, only way i could bring it up if i connect it to an ssid using nmtui
<reev> I am trying to run hostapd on it
<KotCzarny> maybe nm is bringing it down?
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<reev> I have assinged static ip to it but still it is showing down
<reev> what should i do
<KotCzarny> reload kernel module, kill nm?
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<reev> KotCzarny ps aux|grep nm showing nothing
<reev> I tried loading module again but still showing down
<KotCzarny> by nm i mean network manager
<reev> KotCzarny nothing stop network-manager loaded module again assinged static ip but still showing down
<reev> okay
<reev> hostapd started
<reev> KotCzarny now, do i have to perform all this at boot everytime?
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<KotCzarny> reev, depends on what you want to achieve, nm should do it for you, if it doesnt work, then probably you have to configure your distro's network in /etc/ somehow
<KotCzarny> (assuming you dont want nm)
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<reev> Okay Thanks KotCzarny
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<beeble> BenG83__PB: can't see any 4.4 kernel tree in the downloaded archive.
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<BenG83__PB> that is interesting, I havent looked myself yet
<BenG83__PB> what is in there beeble ?
<BenG83__PB> tl is currenly online so can ask questions directly
<beeble> i see a 3.4 and 3.10 kernel tree inside
<beeble> quick look through the manifests show the same versions. so i don't think i miss something
<BenG83__PB> ok I'll tell Tl to double check
<BenG83__PB> maybe he got the wrong file
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<BenG83__PB> beeble, tl is investigating ;)
<BenG83__PB> I think this looks like the BSP v2
<BenG83__PB> maybe the files got mixed up
<apritzel> beeble: good hint, so I can stop downloading ...
<KotCzarny> nothing new in the allwinner's land
<apritzel> beeble: I only saw 3.4 and 3.10 in the first GB as well
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<beeble> think of the enviroment, save some bytes :)
<apritzel> beeble: yeah ;-)
<apritzel> the download was very slow anyway
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<BenG83__PB> yeah I mine finished too now
<BenG83__PB> only see 3.4, 3.10
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<shadeslayer> oooh
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* shadeslayer waits with bated breath
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<apritzel> shadeslayer: I wouldn't hold my breath even if there would be 4.4 kernel tree in there
<shadeslayer> why not? :P
<apritzel> shadeslayer: I bet 20 quid it's not even remotely upstreameable, no to speak of license issues
<KotCzarny> shadeslayer: because allwinner's coding style
<apritzel> *not to speak*
<jelle> KotCzarny: they have one? ;-)
<KotCzarny> yeah, messy one
<apritzel> KotCzarny: the coding style is one thing, though this is actually fix-able
<shadeslayer> apritzel: I don't expect it to be, I just need a BSP kernel interim while I learn and implement pine64's drm in mainline :)
<apritzel> but the whole driver design is completely and utterly broken
<KotCzarny> by coding style i'm not only meaning formatting
<jelle> I've seen some funkey formatting, likely for that touchscreen I had useful documentation though
<shadeslayer> well I was looking at the BSP drm yesterday and apparently they use their own custom memory allocator :P
<shadeslayer> so they don't use the regular helper functions
<apritzel> the only use of the BSP is a reference for undocumented features
<KotCzarny> apritzel, and occasional 'oh, it was gpled there' ? ;)
<apritzel> and for that purpose any kernel base would suffice
<apritzel> shadeslayer: exactly, their code as it is not really helpful
<apritzel> shadeslayer: they tend to ignore kernel infrastructure
<shadeslayer> it's 'helpful' to the point that it allows me to ship a product
<KotCzarny> lol
<KotCzarny> it's exactly THEIR coding style ;)
<shadeslayer> :P
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<KotCzarny> 'it booted, it's shippable'
<shadeslayer> well, for me I need DRM :)
<apritzel> shadeslayer: let's hope I don't have to buy any of your products, then :-P
<shadeslayer> apritzel: I'm pretty sure it's going to be given away for free
<shadeslayer> assuming you already have a board :P
<apritzel> shadeslayer: AFAIK there are already proper mainline patches for DE2 DRM out there
<shadeslayer> apritzel: yes, I am going to build those now :)
<shadeslayer> and see how far I get with the pine64
<apritzel> shadeslayer: *Jedi handwaving* there is no such thing as the BSP *Jedi handwaving*
<apritzel> shadeslayer: please don't waste your time with this, especially for any kind of graphics stack I guess they got it wrong
<shadeslayer> apritzel: heh too late :P
<apritzel> shadeslayer: and chances are it's for Android only anyways
<shadeslayer> I already have plasma5 running
<shadeslayer> ah the BSP v3?
<KotCzarny> it's never too late to get to the light side
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<shadeslayer> if the BSP is only for android, then yeah there's no point
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<shadeslayer> apritzel: when building mainline, should I just make defconfig ?
<shadeslayer> or is there a more specific config for the Pine64
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<apritzel> shadeslayer: no, defconfig should be fine as a base
<shadeslayer> cool
<apritzel> but I think with the latest kernel you have to enable options
<apritzel> for MMC and USB, I think
<shadeslayer> CONFIG_MMC_SUNXI=y
<apritzel> this has been forgotten, ideally we can fix this still for 4.11
<shadeslayer> seems to be enabled?
<shadeslayer> but I'm using MoeIcenowy's de2 branch
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<apritzel> you also need REGULATOR_FIXED_VOLTAGE
<apritzel> shadeslayer: maybe she added it in her defconfig
<shadeslayer> seems to be there
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<igraltist> so opipc2 is ordered, in few weeks i will ask for help to get patches :D
<jelle> igraltist: check the wiki for the mainline status and well linux-sunxi mailing list for patches
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<igraltist> jelle: i will see in future
* jelle thinks u-boot has support in sunxi-next
<jelle> oh http://git.denx.de/?p=u-boot/u-boot-sunxi.git;a=commit;h=9a105426b682a08e6869dfb3d354120b05c6ecf0 :)
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<igraltist> jelle: so maybe its int the next v2017-rc3
<jelle> igraltist: it's not
<igraltist> jelle: i mean from uboot
<jelle> igraltist: merge window closed I think
<igraltist> ok this file i can copy for myself :D
<jelle> igraltist: nope, you just clone u-boot-sunxi
<apritzel> igraltist: it's more than one file ;-)
<jelle> igraltist: since you need more changes
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<igraltist> i saw 4 files, but english and typing is difficult :D
<apritzel> igraltist: the H5 support series has 13 patches, with changes all over the place
<igraltist> ok
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<oliv3r> if I have a regulator, that has special (quirky) behavior; how do I add support for this in the kernel? I'm looking at the axp20x-regulator.c file, but that only gives regmaps to the upper regulator layer basically. But if my regulator has a quirk, i'm sure there's a way to describe this?
<oliv3r> hmm, i guess it can be done with the regulator_ops enable/disable
<wens> i think you can add ramp rate control, and set a limit in the dt
<oliv3r> i'll check that out
<oliv3r> i guess it does not use the axp's internal ramp rate ..
<wens> huh?
<wens> it's just like the voltage stuff
<oliv3r> well the axp has internal voltage ramp up control
<oliv3r> unless that's exactly what you mean :)
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<oliv3r> set_ramp_delay
<wens> regulator-ramp-delay property in the DT
<oliv3r> i'll read into the property more, see what it does
<oliv3r> the thing is, what we need to do:
<oliv3r> if (ldo3 is not enabled); set ldo3 to 0.7 V (min val), wait 1ms, power up ldo3, ramp up to final voltage
<oliv3r> so it's a quirk in it's enable behavior for certain boards (all olimex boards it seems)
<oliv3r> wens: what I'm guessing is that the ramp-delay does, is slowly ramp up the voltage via the AXP's VRC
<oliv3r> unfortunatly the voltage ramping only works After the ldo has been enabled.
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<oliv3r> the questin then is, do we hide the quirk behind the enable/disable functions, or behind ramping
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<wens> i guess you should ask the maintainer
<oliv3r> it is broken enable/disable behavior, but we are technically fixing it via voltage ramping of sorts. So I think you are right, we should hide it as voltage ramping and configure the olimex boards as needing it
<wens> or dig through some of the code first?
<oliv3r> wens: what code do you mean? how other regulators handle it?
<oliv3r> or other boards?
<wens> regulator core
<wens> see what you have
<wens> to work with
<oliv3r> yeah ramping sounds quite reasonable
<oliv3r> well ramping or soft-start; anything in that corner anyway
<oliv3r> ouch; regulator-soft-start is not used by anybody
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<oliv3r> maybe i need both; ramp_delay for the VRC parameters, soft-delay to fix LDO3 behavior under
<oliv3r> hmm, or not; they only set parameters, so it needs to go under enable/disable
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<oliv3r> soft-start and ramp_delay are constraints
<mripard> oliv3r: you should discuss this with the maintainer
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<oliv3r> mripard: well I need to know what i'm talking about first no? :)
<oliv3r> ./scripts/get_maintainer.pl drivers/regulator/ this should get me the maintainer right
<oliv3r> for the regulator it lists no maintainers, only supporters ...
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<oliv3r> plaes: yeah get_maintainers returns that too, but it says 'supporter' not maintainer!
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<wens> supporter means paid to maintain
<wens> maintainer means volunteer
<oliv3r> ah so its maintainer++
<plaes> thanks, wens :)
<oliv3r> i did not know, learn something every day :)
<plaes> oliv3r: so you're currently supporter too.. ;)
<oliv3r> lol true that
<oliv3r> plaes: p.s. I have not forgotten about you ;) just haven't gotten around to it. i'm a shamed, but will fix it :)
<plaes> no worries
<plaes> btw, you might want to test the A20 clock-ng patchset
<oliv3r> plaes: why? anything scary?
<plaes> though, I'll rework it to support A10 too
<plaes> reworks all the clocks
<oliv3r> yeah but that won't land till 4.12 i guess?
<plaes> yup
<oliv3r> so i don't have to worry about that for a year :D
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<oliv3r> are hans and ian still picking up u-boot patches even though it is orphaned?
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<wens> nope
<wens> it's not orphaned
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<plaes> Maxime and Jagan Teki are maintainers now
<oliv3r> I just saw yeah
<oliv3r> but that's for sunxi stuff
<oliv3r> which axp stuff appearantly doesn't show up under
<oliv3r> hopefully the u-boot page gets updated soon
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<plaes> ah.. indeed
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<oliv3r> so the 'i did not know' is almost plausible! :)
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<Putti> Why doesn't http://linux-sunxi.org redirect automatically to https site as there is one? Could the person(s) administering the wiki server set it up in such way? Would be really awesome.
<KotCzarny> what would be the point?
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<jelle> KotCzarny: logging over https is a nice thing
<Putti> stop third parties spying on what I do in the wiki
<KotCzarny> it doesnt use https for login now?
<KotCzarny> o.O
<jelle> KotCzarny: not what I said..
<KotCzarny> putti: if you have to hide from your boss, you should probably use ssh tunnel/proxy anyway
<KotCzarny> ;)
<Putti> I use tor but when I'm logged in to the wiki it shows my username..
<KotCzarny> i have never understood this level of privacy requirements
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<oliv3r> firefox has been so annoying lately, a lot of https site it refuses to open
<oliv3r> i'm sure it's my broken profile
<oliv3r> never-the-less, being able to use non-https is nice :)
<oliv3r> for us broken people
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<oliv3r> hmm, i'm pretty sure i copy/pasted jagan's email from the maintainers file, but I jsut got:
<oliv3r> jteki@openedev.com
<oliv3r> No Such User Here
<KotCzarny> seems its jagan@
<KotCzarny> according to http://openedev.com/
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<plaes> oliv3r: M: Jagan Teki <jagan@openedev.com>
<plaes> this is u-boot MAINTAINERS
<plaes> though, there are some jteki@ emails in sources
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<jelle> plaes: he chagned his mail address some time ago
<plaes> he should've at least kept an alias
<jelle> oh mail bounces?
<plaes> looks like that..
<jelle> :-(
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<tkaiser> igraltist: H5 patches in one location ;) https://github.com/igorpecovnik/lib/tree/master/patch
<oliv3r> or update his e-mail in all sources :)
<oliv3r> but keeping an alias would have been logical in this case, as it's the same domain
<KotCzarny> and apparently owned by himself
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<wens> interesting, ldo3 on axp209 can also be used as a switch (i.e. no voltage regulating)
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<wens> there's also an interrupt for "ldo3 output voltage lower than set value"
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<tkaiser> willmore: in case you already had the time to play around with Zero and NAS Expansion board... could you share your experiences over at Armbian forum in the respective thread. Would also be interesting to test whether short jumper wires in between work without problems (thinking about combining the NAS board with NanoPi NEO2)
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<MoeIcenowy> NEO2 is H5, right?
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<tkaiser> MoeIcenowy: Correct, pictures here: https://forum.armbian.com/index.php?/topic/3576-nanopi-neo-2/ -- If I'm not wrong IgorPec added 10 lines of config to Armbian's build system and NEO2 already runs with 4.10 happily thanks to your all patches here collected there :)
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<oliv3r> wens: ahh, so that's what 'defined by ldo3in' means
<oliv3r> wens: e.g. toggle ldo in
<oliv3r> wens: i'll update my define in u-boot to more accuratly reflect this
<willmore> tkaiser, my power cables just came in the mail yesterday. Once I get back from my kids school I will take a look at it.
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<MoeIcenowy> wens: having a bus reset for r_pio seems to be a tradition of us -- but there's really no one, at least on H3,
<MoeIcenowy> s/,/.
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<MoeIcenowy> and according to A80/A83T user manual there's no reset line for r_pio
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<MoeIcenowy> for A64 there's also no reset for it.
<MoeIcenowy> for A31/23/33 I do not have development board to test it ;-)
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<tkaiser> MoeIcenowy: In case you got in touch with Tsvetan and Olimex will send you a TERES I why not asking for at least their A33 board too?
<MoeIcenowy> what I considered is that I have 3 A33 tablets...
<tkaiser> MoeIcenowy: So you urgently need a 4th A33 device!
<MoeIcenowy> wens: for A80 R_PIO there's no reset line said in user manual, so you may drop RESET_CONTROLLER dependency for its r pinctrl driver
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<apritzel> MoeIcenowy: great cover letter, thank you ;-)
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<MoeIcenowy> I'm feeling that I forgot to cc linux-sunxi
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<apritzel> MoeIcenowy: who was it again that was complaining about not CC:ing linux-sunxi some weeks ago? :-P
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<MoeIcenowy> I think he's plaes ;-)
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<MoeIcenowy> apritzel: I extracted GIC node to sunxi-h3-h5.dtsi in my new version of patch, and changed compatible to arm,gic-400
<MoeIcenowy> both H3 and H5 datasheets referred "ARM GIC PL400 Technical Reference"
<MoeIcenowy> (PL400 is just GIC-400, right?
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<MoeIcenowy> P.S. I remembered when meeting with Allwinner BU2 they said that A63/A6X SoC will start to use Mali Midgard
<KotCzarny> when those new socs be ready?
<KotCzarny> also, were they willing to tidy current mali situation?
<JohnDoe_71Rus> does somebody try use display from smartphone? some times happend touch is broken, but screen work and have good resolution
<plaes> JohnDoe_71Rus: I have thought about it, but you need to create a connector
<MoeIcenowy> KotCzarny: do not know about it ;-)
<MoeIcenowy> according to them A63/A6X will be ready in this year
<MoeIcenowy> and a 16nm SoC will be ready in the next year
<KotCzarny> MoeIcenowy: any more details/rumours?
<JohnDoe_71Rus> part can be find in repair workshop. One man repair phone. He just throwing away many parts
<MoeIcenowy> what I have known is that A63 will feature no internal MAC
<MoeIcenowy> but it will have an internal eDP controller
<KotCzarny> byh-bye nice and tiny ethernet farms
<MoeIcenowy> so there may not be even many development boards with A63
<MoeIcenowy> but A6X will have internal MAC
<MoeIcenowy> X is a still-unknown number
<MoeIcenowy> in their product line A63 is tagged "Mid/High" and A6X as "Ultra Quad-Core"
<KotCzarny> i wonder what would happen if linux-sunxi could be persuaded to ignore one soc just to see what changes
<KotCzarny> ultra? a57 maybe? ;)
<MoeIcenowy> I don't know
<MoeIcenowy> but I don't think Allwinner will produce big cores again
<MoeIcenowy> after the commercial failure of A80
<KotCzarny> what could they mean by ultra
<MoeIcenowy> KotCzarny: I think if a SoC do not have hackable boards it will be automatically ignored
<MoeIcenowy> oh it's possible ;-)
<MoeIcenowy> They tagged A33 as "low", A64 "middle", A83T "high", A64 "mid/high", but only A6X "ultra"
<KotCzarny> hehe
<KotCzarny> a33 low?
<MoeIcenowy> KotCzarny: otherwise which chip will be low?
<KotCzarny> they arent even same generation
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<MoeIcenowy> In fact it's some material that is distributed on CES
<MoeIcenowy> but I think A33 and A83T is a generation ;-)
<MoeIcenowy> A64 is a newer, with 40nm A53
<MoeIcenowy> and A63/X more newer 28nm A53
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<KotCzarny> so 14nm a53 being ultra? ;)
<KotCzarny> s/14/16/
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<MoeIcenowy> nope A6X is still 28nm
<MoeIcenowy> but if it's more ultra than A83, I think the only solution is cores better than A53 ;-)
<KotCzarny> we will see in a year or so
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<montjoie> CryptoEngine successfully pass RSA 512 test thanks to walkiry
<KotCzarny> yay!
<willmore> Midgard on 28nm?
<willmore> I guess that's right. I was thinking of the newer one..
<willmore> montjoie, that's great news! Thanks walkiry!
<montjoie> at origin, I buy H3 only for that (RSA accel)
<KotCzarny> montjoie: did the quirk fix hurt performance further?
<montjoie> no bench for the moment
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<MoeIcenowy> According to Allwinner guys the TOC0 is signed with RSA
<MoeIcenowy> so every SoC with secure boot is mostly possible with RSA support in CE ;-)
<MoeIcenowy> montjoie: what quirk?
<montjoie> no quirk I remember
<montjoie> just the CE support only RSA with padded data
<montjoie> but openssl do the same
<montjoie> so no problem for openssl engine acceleration/offload
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<ssvb> jemk: about 0.5s normal vs 1.13s secure boot time difference from https://irclog.whitequark.org/linux-sunxi/2017-02-28#18947983;
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<ssvb> jemk: have you measured it via a simple reboot loop?
<ssvb> jemk: how big was the SPL and where did you load it from?
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<jemk> ssvb: 24KiB SPL from sd-card, measured by oscilloscope, from 5V rise to first uart start bit
<jemk> ssvb: ah, right, the toc has been at least 32KiB then, so that could also add some time difference, didn't notice that
<KotCzarny> hrm, H3 has nand support?
<KotCzarny> o.o
<MoeIcenowy> KotCzarny: yes ;-)
<MoeIcenowy> all Allwinner SoCs except V3s have NAND support ;-)
<KotCzarny> know any h3 board with nand?
<ssvb> jemk: well, TOC0 is inherently bigger so it is a kinda fair comparison
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<MoeIcenowy> KotCzarny: no.
<ssvb> KotCzarny: my understanding is that eMMC is just a somewhat better alternative, so NAND is getting gradually phased out
<MoeIcenowy> but it's said that some low-end tablets may continue to use NAND
<KotCzarny> ssvb, i'm just shocked to find nand wip for h3 in status table ;)
<MoeIcenowy> as NANDs are cheaper a bit ;-)
<KotCzarny> bit cheaper, but much worse ;)
<MoeIcenowy> although the bit cannot exchange for the convenience of eMMC
<jemk> ssvb: i don't know whether this 16kib size alignment is required, i only imitated the original generator, then toc0 would only be ~1KiB bigger
<MoeIcenowy> so they will only occur on extreme low-end devices now ;-)
<ssvb> jemk: we may surely try to test this
<ssvb> jemk: do you have an example code to set the secure bit in eFUSE? it may be a good idea to add it to the wiki with a ton of warnings
<ssvb> jemk: is it really straightforward or do we need to setup some clocks and open gates?
<jemk> ssvb: i did it with mw in u-boot, it was pretty simple, no clocks or gates, just: https://github.com/longsleep/u-boot-pine64/blob/pine64-hacks/arch/arm/cpu/armv7/sun50iw1p1/efuse.c#L118
<ssvb> jemk: ok, thanks
<ssvb> maybe I'll try to destroy my Orange Pi PC (because I still have Orange Pi Plus 2E and Orange Pi Zero)
<MoeIcenowy> I think now we need to make some code to convert a eGON.BT0 to a TOC0 ;-)
<ssvb> MoeIcenowy: there is already jemk's script, and I'm working on an easier to use solution
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<ssvb> MoeIcenowy: you can directly convert eGON.BT0 to TOC0 via jemk's script if you don't care about correct boot source reporting, but other than this everything is working
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<ssvb> jemk: do we have an example of a correctly signed TOC0 image?
<ssvb> jemk: seems like your findings somewhat contradict with AW claims
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<jemk> ssvb: i compared with the remix mini image and also generated my own with their tools, they are bit-identical with my script
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<jemk> using the same key and code their tool generates exactly the same toc0
<jemk> *generated ... in the meantime i removed some unused stuff in the cleanup process
<ssvb> jemk: ok, thanks, still it would be good to confirm that these images are actually accepted by the secure BROM if the ROTPK_HASH is programmed in eFUSE
<ssvb> but somebody would need to sacrifice one board for this :-)
<ssvb> jemk: I mean, their tool in the current SDK release may be potentially a buggy crap
<jemk> ssvb: i also looked at the brom code a lot, i'm pretty sure it will work
<ssvb> ok
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<jemk> ssvb: without the rotpk_hash the signature is still checked the normal way (and that works), only that every public key is accepted. the check for correct pubkey is a simple sha265 and memcmp with efuse, not too much that could go wrong
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<ssvb> jemk: will you share an updated script? because I really want to implement a simple eGON <-> TOC0 images conversion library for sunxi-tools here and now
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<jemk> ssvb: i didn't have plans to update it. is there anything i should update?
<ssvb> jemk: oh, I must have misinterpreted "in the meantime i removed some unused stuff in the cleanup process", I thought that you are trying to add some changes right now (like the alignment update, etc.)
<jemk> ah, no, that was before i published it
<ssvb> ok, thanks
<jemk> removed from the first version where it was bit-identical
<ssvb> you have done a great job investigating this stuff
<ssvb> now we just need to "productize" it :-)
<apritzel> jemk: ssvb: I made an "efuse" command in U-Boot
<apritzel> to read and write fuses
<jemk> investigating such stuff is fun, but i didn't have enough time to continue, that all happened summer 16
<apritzel> write needs to be configured in explicitly
<apritzel> also it asks and requires you to type "yes"
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<ssvb> jemk: just in case because you have already looked at this part of the secure BROM code, is there really no way to lock the boot process to some particular boot media type (by comparing it with some byte in the eFUSE)?
<ssvb> but I guess it just makes sense for the locked down firmware providers to sign their bootloaders with their secret key, check the boot media type in the bootloader itself and be done with that
<jemk> ssvb: i didn't see any, the boot process is like normal brom, only instead of jump to 0x0 at the end they call a function to parse/check/run the toc0
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<shadeslayer> hi
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<shadeslayer> the way I understood it is, they're the number of channels?
<shadeslayer> but what does vi and ui mean there?
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