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<wens>
mripard: ah i see
<wens>
mripard: another undocumented 'feature'
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<mripard>
wens: 1bea07f16da0
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<wens>
so much for using ordinary 8250 earlycon
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<mripard>
wens: earlyprintk doesn't use interrupts iirc
<mripard>
it only outputs data, but doesn't read any
<wens>
mripard: ok, i'll look into the new earlycon stuff, which uses DT, so should be cross platform
<wens>
iirc it can read stuff in though
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<fathead>
libv: is the in-circuit buildroot URL for the SoMPi public/shareable? I'm still waiting for a response from them.
<libv>
i do not see why not, but, i will try to finish the device page ASAP, and get the fex file and such included in our sunxi repos
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<libv>
fathead: i do not want to reward these assholes more than we already have and will though
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<fathead>
sure, I understand - thanks for the help poking them
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<libv>
fathead: do get your customer to talk to olimex, yes, the som is slightly bigger, but at least olimex does not act this questionably
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<fathead>
libv: I've just sent an e-mail to them to say I'm switching to look at the olimex until I get the buildroot
<fathead>
(I've been on other things since the 17th)
<libv>
fathead: tyhanks
<libv>
thanks even
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<libv>
fathead: even if they do end replying, can you really recommend a supplier that is that unresponsive and bad at what they are supposed to do?
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<Seppoz>
anyone have any infos about allwinner a40?
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<Inode>
Seppoz: is there really an A40?
<NiteHawk>
Seppoz: you're not referring to the 'rumoured'/marketing name of what later ended up as A31? http://linux-sunxi.org/A31#History
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<NiteHawk>
there are some hints (namely an Olimex blog post) that Allwinner may release a new quad core that's pin compatible with A20/A10, but it's unclear if that might be named A40
<wens>
don't see any new a-series chips
<wens>
seems like olimex has a33 prototypes, and is working on h3
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<rellla>
is there a possibility, to debug the actually allocated memory of the ve_mem_reserve or reserved CMA, to see how many of the reserved memory is definitly used?
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<rellla>
sry, i think i found a way which suits to my purpose...
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<ajeandet_>
Hi is there any interest in adding some hardware resources on the wiki such as kicad footprints? My point would be to add some resources to start making PCBs.
<libv>
ajeandet_: as long as you respect licenses of the projects that you get the kicad files from, sure
<ajeandet_>
libv: For sure, I plan to make them ;)
<libv>
ajeandet_: sounds great :)
<ajeandet_>
libv: I got some funding in my lab to make a kind of evolutive tablet, it would be for next year.
<ajeandet_>
libv: I order some chip from olimex today, next step would be to get a working DDR3 layout on kicad I would share as a base design.
<Inode>
ajeandet_: a tablet that finally features an easily detachable/replacable battery would be great :)
<Inode>
are you using any of the allwinner tablet reference design schematics at all?
<ajeandet_>
Inode, To be clear I work for a research lab, I will share everything I will make but wont sell anything.
<Inode>
that's cool, i'm just asking out of personal curiousity
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<ajeandet_>
Inode: I will use Olimex designs as reference since they share schematics. And yes the battery should removable.
<ajeandet_>
The idea is not to make it really slim but to add an FPGA and turn it into an oscilloscope, a generator or anything custom.
<libv>
ajeandet_: olimex does full oshw :)
<libv>
for all but their soms, as there is a market for people who are afraid of oshw
<ajeandet_>
libv: Yes and no since eagle isn't, in my opinion eagle isn't much better than Altium or any other
<libv>
ajeandet_: yeah, tsvetan is aware of eagle not being the most open source friendly solution
<libv>
but still, nobody currently does match olimex with respect to oshw
<ajeandet_>
libv: that's why sharing the DDR3 layout would be a big kickoff, and yes Olimex is the best I agree.
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<ajeandet_>
libv: the first prototype will be based on their a20 som.
<ajeandet_>
One more question, does anyone tried to find the max speed of UARTs on A20?
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<Inode>
according to the A20 user manual section on UART, page 648/835: baud rate = (serial clock freq) / (16 * divisor)
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<Inode>
page 51 has a table describing APB1_CLK_DIV_REG, and it features a bit field labelled APB1_CLK_SRC_SEL that apparently defaults to 0x00 (OSC24M) - assuming that's a 24MHz clock divided by 16 at best, 1.5MHz or ~1500000bps?