Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
<TheLinuxBug> dario111cro: this is a pretty easy going channel. You will likely not get an immediate answer to your questions, especially to the dev etc. If you have a question, please feel free to ask it but you should patiently wait until someone is available to answer. In this case, I do not have an A31 or any experience, so I am sorry I can't help you with your question my self.
<TheLinuxBug> Maybe one of the other guys will be around later and will reply :)
<dario111cro> Sure, great
<dario111cro> I'm not actually really interested in A31, but I need analog TV input
<dario111cro> it could be possible to use analog tv decoder (like TVP5150) that outputs in BT.656 format, but I'm not sure how to feed this signal over CSI to GPU
<dario111cro> H3 apparently "Support CCIR656 protocol fot NTSC and PAL"
<dario111cro> I understand that this is easz going channel. Since I have to close IRC client, please email me if you know anything about using analog video input with sunxi board (using video decoder or whatever)... going crazy lately trying to find any information
<dario111cro> dario111cro@gmail.com
<dario111cro> thanks! :)
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<philippe_fouquet> bbrezill1: I see your path for booting on nand It work for an A20 SoC and how you flash it
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<RSpliet> bbrezillon: I'm having a chat with derRichard about per-partition ECC (and randomisation) in #mtd on OFTC
<RSpliet> and he seems to believe this is a bad idea to implement
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<RSpliet> and to be honest, the more I think about it, the more I tend to agree... we're just being taken from behind by BROM here for supporting such limited configurations, but there's no reason why you wouldn't want to try and max out settings always
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<RSpliet> more importantly, judging the structure of the MTD and NAND layers, I don't see any sane way of implementing it tidily; it doesn't fit the current model at all unless ECC is carried upwards to the MTD layer
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<RSpliet> if you wish to join the discussion you can join the channel there, or we might have to set up an e-mail thread on their ML to explain the sunxi situation and motivate why you'd want this support
<RSpliet> for U-boot, I'm going to leave per-part settings as a todo, and only support the one setting the UBI FS is built on top of
<RSpliet> consequently, U-boot can't read U-boot... but that's fine for the boot process
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<wens> interesting, C.H.I.P. partnering with Free Electrons
<simosx> niiice.
<libv> that does however tell us that they had not properly investigated things beforehand.
<wens> libv: what do you mean? that allwinner doesn't support mainline as part of their sale?
<libv> wens: what i read from the size of the statements there, and the fact that those were not available earlier, is that the chip guys only discovered about mainline and gpl violations recently
<libv> and not before or at the start of their kickstarter campaign
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<NiteHawk> even if the r8 soc is new, wouldn't that have had to be expected based on previous allwinner conduct?
<libv> NiteHawk: they just took allwinners word for it and were then surprised (and not too happy) with the bad stigma and bad marketing that happened as soon as the kickstarter went public
<libv> but good to know that they tied with free electrons and that the right thing(s) will happen now
<NiteHawk> could be - i'm not trying to blame them. but a little research on the A10/A13/A20 history might have revealed nasty details (the R8 is based on A13 as i understand it)
<libv> NiteHawk: this kickstarter, the fact that this change now is pasted out that big, and only happened now and not earlier, very clearly states that they had not done their homework
<libv> and that, in the time between these issues getting known to the chip guys, and now, i have not been told the truth
<NiteHawk> it might even be a good thing - if a broader audience increases the pressure on Allwinner to do something about the proprietary blobs (or multiplies their negative publicity otherwise)
<libv> sure
<libv> and it is now
<libv> it could've gone either way just a few hours ago
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<adj_> nothing unexpected from CHIP
<adj_> they could pay libv to make a proper gallium driver from lima!
<libv> adj_: i rather doubt that they intend support someone as nasty as me, someone who points out shortcomings is always immediately blackballed.
<adj_> :)
<adj_> don't talk like that in a job interview
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<libv> i do, all the time, as it doesn't help to hide the fact that i change stuff and often step on peoples toes. if people are unable to admit that they are doing some things wrong, then they have no reason to hire a consultant to begin with, and my deployment can only go wrong.
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<paulk-collins> wait "Our plan is to mainline support for user-space drivers for these binary blobs." wut?
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<libv> paulk-collins: i am left wondering what their margins are though
<libv> 10% of 2m usd does not buy that much developer time
<paulk-collins> really?
<libv> really.
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<mripard> paulk-collins: I don't really expect it to be mainlined, but our plan should be to make them work on top of mainline
<paulk-collins> ah okay
<paulk-collins> makes more sense
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<libv> mripard: their statement states that they will be running mainline, not "some things on top of" mainline.
<mripard> I know.
<libv> ok, i read from that that the broker of that deal between free-electrons and c.h.i.p. has already been on the phone several times in the last 24h :)
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