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<linkmauve1>
I’ll probably make a ML post about it, but I have to do a six months internship to finish my masters, and I found a company who would sponsor the development of mainline graphics support for the sunxi platform.
<linkmauve1>
Is there already some work in progress in that direction I could base my work on?
<linkmauve1>
Also this would be my first dive into the kernel, I already know quite a bit about the userland DRM API by having played with Wayland compositors, but still nothing about the other side.
<bbrezill1>
linkmauve1: hi, feel free to ask if you need help
<linkmauve1>
u-boot is using a simple framebuffer driver, right?
<linkmauve1>
I still haven’t looked at the code.
<linkmauve1>
bbrezill1, are you planning on working further on that? I wouldn’t want to step on your toes.
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<mripard_>
linkmauve1: u-boot is creating a framebuffer, and just gives the memory area the framebuffer is mapped to to Linux
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<mripard_>
so u-boot should have most of the code
<mripard_>
at least to get things roughly working
<linkmauve1>
Ok.
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<linkmauve1>
I don’t think I’ll start working on that before the beginning of my internship, but I’d like to have a rough idea of my working plan before accepting their offer.
<bbrezill1>
linkmauve1: I don't have enough time to work on this topic
<linkmauve1>
Ok.
<bbrezill1>
this is definitely a good thing if someone can take over
<linkmauve1>
How does it fit with UMP, is that module totally linked to 3.4 or is it salvageable?
<bbrezill1>
anyway, keep me informed of your progress, and don't hesitate to share your ideas
<linkmauve1>
Or even worth porting over. ^^
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<bbrezill1>
linkmauve1: what do you mean by UMP ?
<bbrezill1>
GPU support ?
<linkmauve1>
I guess that can come much later.
<linkmauve1>
But yeah, AIUI it’s the module doing buffer allocation on 3.4, is it only used for the GPU?
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<bbrezill1>
linkmauve1: AFAIU GEM allocations should be implemented by the display controller driver, and the GPU should use GEM objects allocated by the display controller, but I'm not sure
<bbrezill1>
I've only developed a display controller driver for an SoC that does not embed a GPU
<linkmauve1>
Ok.
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<jero>
is there a way to reset an uart on sun4i? I'm doing lots of transfers and it feels like my uart goes crazy after a few hours, I can't get it back to normal behavior without restarting.
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<mripard_>
wens: ping?
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<mmarker>
Ok, trying to make sense of the A20 datasheet. Is there i pin i can pull high/low/sideways to reset a A20/A10? Seems like the hardware watchdog doesnt always watchdog too well, and working on a circuit to force reset a A20 board.
<NiteHawk>
for A20 pin C14 is RESET#
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<mmarker>
Got that. Datasheet is a touch sketchy. It implies if i pull it low it should reset something. Guess it wont hurt to try.
<NiteHawk>
right, # here means active low
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<mmarker>
Ok. Thanks. Guess it'll be worth a shot!