So, looks like p_ENABLE_REGS_16_31=0 increases the ICESTORM_LC usage from 3967 -> 3988!?
mithro: Accessing x16-x31 in rv32e is supposed to fault. picorv32 doesn't impl this, but I imagine there's a separate check in the reg fields of the opcodes, so that picorv32 knows to ignore insns using x16-x31
mithro: you do need a few more LCs to latch rs1, rs2, and rd
oh, the other way around
Any idea why p_CATCH_ILLINSN=0 would *increase* the resource usage?
at this point I suspect that your control inputs are being inverted or otherwise misinterpreted
is it possible to confirm in simulation that you've actually built a core that hangs on illegal instructions?
Also check how many LUTs/FFs Yosys is synthesising