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<sorear> the "any module you declare in your code but don't instantiate gets instantiated as a toplevel" rule seems … difficult to work with
<whitequark> yosys has a -top option
<zkms> there's also default nettype nonsense lol
<sorear> look i'm quite familiar with use strict; and god is real, unless declared integer
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<lain> XD
<sorear> §13 "configurations" in the verilog spec seem like something I haven't seen at all in open rtl
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<azonenberg_work> sorear: fwiw, the things that are in the spec
<azonenberg_work> and the things supported by tools
<azonenberg_work> are NOT the same thing :)
<TD-Linux> whitequark, [ ERROR] glasgow.cli: register 0x01 does not exit
<TD-Linux> does this mean it can't talk to the fpga
<whitequark> TD-Linux: yes
<whitequark> what are you doing exactly
<whitequark> and what is the complete debug log
<whitequark> (glasgow -vv)
<TD-Linux> I actually tried the real selftest
<whitequark> hm
<whitequark> yeah weird
<TD-Linux> gonna touch up the ice40
<TD-Linux> maybe have been intermittent before
<sorear> azonenberg_work: yes, i just spent the evening reading 1364:2005 after trying and failing to use several (retrospectively) 1800:2012-only features in iverilog
<azonenberg_work> sorear: even with SV-supporting tools
<azonenberg_work> the subset of SV you can use in, say, vivado vs VCS vs synopsys DC
<azonenberg_work> are not the same thing
<sorear> i was theoretically aware of that but i didn't expect to hit it on day 1
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* sensille is always surprised how much you can hit on day 1
<TD-Linux> touched it up and got way farther
<TD-Linux> oh wait no less far
<whitequark> oh?
<TD-Linux> I get FPGA configuration failed now
<whitequark> huh
<whitequark> sounds like soldering issues yes
<TD-Linux> will keep trying until it werks
<TD-Linux> imagine if solder was theromsetting and you had to scrap the board every time you screwed up
<whitequark> heh
<TD-Linux> woo passed self test
<TD-Linux> problem was too much solder on the ground pad again :)
<TD-Linux> pushed it down hard with tweezers and squeezed out a drop
<whitequark> :D
<whitequark> sweet
<whitequark> all modes?
<whitequark> or just pins-int?
<TD-Linux> pins-int
<TD-Linux> let me test the rest now
<TD-Linux> going to put parts on to run voltage now
<whitequark> meanwhile i have an *almost* working event analyzer
<azonenberg_work> whitequark: i need to make a BIST for more of my boards
<whitequark> like logic analyzer but it also shows you everything that happens inside the FPGA
<whitequark> azonenberg_work: does this mean i out-azonenberged you at something you do? :P
<azonenberg_work> whitequark: no, more like most of my boards never make it to the point of being somewhat production ready
<whitequark> oh.
<azonenberg_work> I have a small number of designs that have made it to the point that i use them in the lab on a daily basis but i just made one batch and that was that
<azonenberg_work> i know those particular units work
<azonenberg_work> and i never had any intent to make more
<azonenberg_work> i certainly would do some kind of test procedure if i was doing a design i expected other people to use
<azonenberg_work> thats something i want to think about for starshipraider actually
<azonenberg_work> i'll probably make a loopback plug of some sort you can use to test probe cards etc
<whitequark> yeah that's how glasgow selftest works
<whitequark> azonenberg_work: so
<whitequark> the glasgow cycle-accurate analyzer mostly works now
<whitequark> lemme grab some representative trace
<cr1901_modern> Does an event analyzer send a timestamp and payload, where "1" in the payload means "certain pin toggled"?
<whitequark> there's a more complex protocol
<whitequark> it doesn't just do pins
<azonenberg_work> whitequark: you've seen this right? http://thanatos.virtual.antikernel.net/unlisted/nocsniff.png
<whitequark> and it tries really hard to use BRAMs optimally
<azonenberg_work> this is the antikernel equivalent of strace
<whitequark> azonenberg_work: yeah I made the glasgow equivalent of strace
<whitequark> it's designed to fit in really smol FPGAs
<whitequark> like it uses a uh.... 4 BRAMs if you just analyze one applet
<azonenberg_work> yeah antikernel, at least this version
<azonenberg_work> was not size optimized at all
<whitequark> that's ice40 BRAMs of course
<azonenberg_work> antikernel v0.2 is much more scalable and should perform better on low end stuff
<whitequark> so 512 bytes
<azonenberg_work> But i also havent touched it in ages :p
<whitequark> and it still can buffer quite a bit
<whitequark> ok, sorry, 5 BRAMs
<azonenberg_work> (yay for not having a habitable house)
<whitequark> there's also one USB FIFO
<whitequark> still, UP5K has thirty
<cr1901_modern> >there's a more complex protocol
<cr1901_modern> Could you elaborate?
<whitequark> cr1901_modern: gonna push the code in a bit
<whitequark> it has tests
<whitequark> just need to fix one bug I think
<TD-Linux> voltage setting works
<keesj> Hmm the schematics of ice40up5k in kicad has pin IOB_22b but http://www.latticesemi.com/view_document?document_id=51971 shows IOB_22a
<whitequark> probably a bug
<keesj> between keyboard and chair?
<whitequark> in the kicad symbol
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<whitequark> wtf
<whitequark> I have all endpoints working except EP4OUT
<whitequark> this makes precisely no sense
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<TD-Linux> hmm Vsense=0.00
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<pie__> is there anything on this site that isn't massive shilling lol https://www.semiwiki.com/
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<whitequark> oh.
<whitequark> it was a one-character typo.
<whitequark> that i looked for for 3 hours...
<whitequark> something something Ada
<openfpga-github> [Glasgow] whitequark pushed 2 new commits to master: https://github.com/whitequark/Glasgow/compare/5ac4c8d451f4...d523176c266c
<openfpga-github> Glasgow/master d523176 whitequark: firmware: fix EP4 FIFO reset code....
<openfpga-github> Glasgow/master 5771419 whitequark: applet.selftest: test USB FIFO faults.
<travis-ci> whitequark/Glasgow#58 (master - d523176 : whitequark): The build passed.
<whitequark> azonenberg_work: https://hastebin.com/sufuderajo.cs
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<whitequark> azonenberg_work: https://imgur.com/a/Z67hKU7
<openfpga-github> [Glasgow] whitequark pushed 3 new commits to master: https://github.com/whitequark/Glasgow/compare/d523176c266c...c04cfa79dc63
<openfpga-github> Glasgow/master c04cfa7 whitequark: applet.nand_flash: fix setup/hold violation.
<openfpga-github> Glasgow/master 116413a whitequark: Implement a basic integrated event analyzer....
<openfpga-github> Glasgow/master d33a488 whitequark: gateware.analyzer: implement an event analyzer....
<travis-ci> whitequark/Glasgow#59 (master - c04cfa7 : whitequark): The build passed.
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<felix_> if there's anyone active in here who wants to go to the 35c3: the presale has started and if there's interest, i could try to get a presale token for openfpga
<florolf> rqou: ^
* felix_ waves at florolf
<florolf> *nods*
<florolf> i also didn't receive a voucher yet, but it seems that there was some kind of fuckup in sending vouchers to teams
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<felix_> florolf: uh oh. but i'm sure that that will work out in the end :)
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<pointfree> This new irccloud bouncer is great.
<pointfree> Looks like digshadow turned it on too. Works.
<digshadow> pointfree: yeah still testing, but initial impressions good
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<pointfree> digshadow: irccloud just disconnected and reconnected me from freenode after I closed and reopened pidgin.
<digshadow> pointfree: set the rooms as persistent in pidgin
<digshadow> also IIRC it will only do that if you close the window, not pidgin itself
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<pointfree> digshadow: irccloud says we will get channel backlog in 3rd party clients as well. "not yet"
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<digshadow> pointfree: its no worse than it was before
<digshadow> pointfree: OTR seems to have issues
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<steve|m> JTAG tap: riscv.cpu tap/device found: 0x10e31913 (mfg: 0x489 (SiFive, Inc.), part: 0x0e31, ver: 0x1)
<steve|m> hurr
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<sorear> what sorts of tools do you use for that?
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<tnt> sorear: looks like openocd
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<pie__> when you get a deleted apk from $sketchy_mirror_site ....the internet is a strange place
* pie__ decompiles
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* qu1j0t3 decompiles pie__ .... waiiiiit this is all 6502 machine code
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<pie__> qu1j0t3, should i be proud or disappointed
<qu1j0t3> you're a few transistors short of a Pentium 4, son
<rqou> lewd
<pie__> qu1j0t3, :(
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