<rqou>
it seems that g5 is still "special" somehow?
<kc8apf>
right. makes perfect sense.
<kc8apf>
G5 was a POWER4 with altivec hacked on
<rqou>
at least the fruit-computer version is apparently special for being BE-only
<kc8apf>
I recall it having bits to flip to LE mode. Never tried them tough.
<kc8apf>
G5 also had an Apple-custom processor interconnect to the chipset
<rqou>
apparently it doesn't work on the mac
<rqou>
kc8apf: i'm curious, in your opinion which is the most cursed? g5, xenon, or cell?
<kc8apf>
what do you mean by cursed?
<rqou>
somehow horrible or hacky or awful to program
<kc8apf>
g5 and cell are terrible in different ways
<kc8apf>
never played with xenon but I recall it being similar-ish to g5
<kc8apf>
oh, no it's more like cell
<kc8apf>
just MS bought a bunch of g5s for development workstations
<kc8apf>
cell is by far more horrible to program for. SBEs require you to rework algorithms just to use them.
<kc8apf>
g5 (ppc970) was just a monster that required some careful understanding of the pipeline to get high performance
<kc8apf>
from a design standpoint, cell was much cleaner. ppc970 was literally a POWER4 cut down, altivec hacked on, and debug signals turned into performance counters
<rqou>
wat
<rqou>
why?
<kc8apf>
cell was coming from POWER6 which switched to in-order execution after the 200+ in-flight instruction monsters of POWER4 and POWER5
<rqou>
> debug signals turned into performance counters
<kc8apf>
the full perf monitoring for pOWER4 was too big for ppc970. They needed to make room for Altivec.
<rqou>
was all of this done just for apple?
<kc8apf>
so the ppc970 perf counters are a hodge-podge of muxes and byte selects off the debug bus. 99% of the events are useless
<kc8apf>
yep
<kc8apf>
Motorola/Freescale had no plans after ppc7450
<kc8apf>
IBM was focusing on processors for AS/400 and RS/6000
<kc8apf>
IBM was willing to modify a design to fit a desktop usage
<kc8apf>
Freescale wasn't
<kc8apf>
There was some indication that IBM thought it would re-open the desktop market to them
<kc8apf>
but IBM has never been able to design low-power parts.
<rqou>
so is that why the g5 mac consumes a bajillion watts?
<kc8apf>
yup.
<kc8apf>
early dev units came with 20A plugs
<kc8apf>
and instructions to distribute them over different lab circuits
<kc8apf>
the g5 laptop prototypes were wishful thinking
<kc8apf>
of course, there were also dual processor g4 laptop prototypes
<rqou>
cursed
<kc8apf>
other tidbits: ppc970 had a few quirks about power-on behavior. The processor cards include a PIC to bit-bang JTAG to get the processor to start.
<rqou>
aaaaaaaaaaah
<rqou>
fucking apple
<kc8apf>
normally IBM's service processor would do that for you
<kc8apf>
see the crazy crap in OpenBMC for Power8 and Power9 machines
<rqou>
does the g3 do anything crazy like that?
<rqou>
somehow "systems-level" docs for ppc macs are impossible to find
<kc8apf>
nah. ppc750 was a fairly clean design
<rqou>
although somehow people have managed to port linux to them
<kc8apf>
ppc7400, 7410, and 7450 all suffered from freescale screwing up branch target caches and having poor l2 cache yields
<rqou>
so those are apple's "g4"?
<kc8apf>
yup
<rqou>
i actually have noticed that the g3 performs quite well considering it's a 1999-era machine
<kc8apf>
I used a 7450 with a broken L2 cache as my workstation at Apple for a long time
<rqou>
except the graphics isn't accelerated
<TD-Linux>
kc8apf, yeah it's kind of crazy to have to wait for openbmc to boot before you can hit the power switch
<TD-Linux>
that said, I'll 100% take over intel me
<azonenberg_work>
TD-Linux: is it that hard to have a tiny cpld doing that kind of stuff?
<kc8apf>
intel's chips all assume BMC is optional.
<azonenberg_work>
in gateware
<azonenberg_work>
with no access to anything but power pins, resets, etc
<azonenberg_work>
i.e. no chance of corrupting/altering system state
<TD-Linux>
azonenberg_work, they have an ice40 on board with icestorm to handle some of it
<TD-Linux>
the bmc supports actual bmc things though oto
<kc8apf>
azonenberg_work: that's what intel tends to do on their reference boards
<TD-Linux>
kc8apf, true but on them they have the intel me in addition to a bmc
<azonenberg_work>
kc8apf: i mean instead of me
<TD-Linux>
on power9 the bmc basically does the same tasks as intel me
<azonenberg_work>
i want a cpu that comes out of reset executing out of memory mapped spi flash
<azonenberg_work>
and has no onboard bootrom
<TD-Linux>
azonenberg_work, the hifive does that
<azonenberg_work>
TD-Linux: yeah but no desktop class cpu does it
<azonenberg_work>
not even most arm stuff these days
<azonenberg_work>
i also don't get why ram initialization is so software driven
<rqou>
er, i thought it had some hidden "fix errata and set up boot" rom that wasn't open?
<kc8apf>
hasn't since Nehalem?
<TD-Linux>
rqou, oh maybe. I forget
<azonenberg_work>
is it that difficult to read a SPD in gateware?
<rqou>
iirc bunnie mentioned that
<TD-Linux>
azonenberg_work, because it's easier and cheaper?
<azonenberg_work>
and initialize the ram s.t. when the cpu comes out of reset dram is already initialized
<azonenberg_work>
(this is how all of my fpga systems work)
<rqou>
oh btw still on the topic of "fun" machines
<azonenberg_work>
writes just block until ram is ready
<azonenberg_work>
then ram works
<azonenberg_work>
no bios, no bootloader
<rqou>
kc8apf: idk if you were at apple back then, but i have a supposedly-a-prototype imac
<azonenberg_work>
app code running out of the gate
<kc8apf>
rqou: which generation?
<rqou>
the original one
<kc8apf>
ah. I built a few of those out of scrap parts
<rqou>
it's the 333 mhz refresh of the tray-loading version, but still in a bondi blue case
<rqou>
feels really fast given that it's only 333 mhz
<kc8apf>
azonenberg_work: RAM training is one of those things that they tweak and tweak until it works
<rqou>
huh, wikipedia apparently mentions that this machine was supposed to ship with _32 MB_ of ram
<rqou>
kinda hard to imagine nowadays :P
<rqou>
of course because moore's law i turned it into 512 MB
<kc8apf>
anyway, on intel server parts, they have a lot of holdovers from long ago.
<rqou>
no more piece of shit mac os 9 memory manager
<kc8apf>
power on is a signal routed to the PCH which generally handles the start-up sequence
<kc8apf>
when a BMC is added, they route that signal to the magic GPIO banks on BMC SoCs that have POR behavior of turninig each pair of pins into a loopback
<kc8apf>
that way the power button works even when the BMC is booting
<rqou>
wtf
<kc8apf>
once the BMC is up and running, it flips a bit that turns off the loopback and then asserts control of the output state
<TD-Linux>
yeah the talos board doesn't have that, hence the 30 second wait for linux to boot on the bmc after plugging in :)
<kc8apf>
BIOS was directly on LPC for a long time. Intel would add a CPLD so the BMC could flip a mux and and become the LPC master to the BIOS flash. When the BMC is done writing its update, it flips the mux back and hits the reset line
<kc8apf>
TD-Linux: the loopback GPIO bank is there on talos. Power9 just requires a bunch of commands over FSI before it will start
<TD-Linux>
ahh ok
<TD-Linux>
I bought some spare flashes so I can screw around with talos harder
<kc8apf>
nowadays BMCs have LPC slave interfaces to capture port 80 decode, control flash write through, etc
<kc8apf>
typically, the BMC software stack leaves a bit on that allows the LPC interface to have direct access to the BMC's AHB
<rqou>
aaaaaaaaah
<rqou>
wtf
<kc8apf>
that's a pretty common way for host processors to update the BMC firmware
<kc8apf>
they command the BMC's FMC directly via LPC
<TD-Linux>
interesting
<rqou>
so, thoughts on the ps4 architecture? :P
<TD-Linux>
on openbmc on talos you have to copy a new image into ram and then tell it to reboot and write it to flash
<rqou>
if you're not familiar, the "southbridge" or "pch" equivalent is a marvell armada soc with a pcie slave glued in
<TD-Linux>
and you're 100% hosed if that fails anywhere
<kc8apf>
TD-Linux: ah, so they did take my team's updates to that
<TD-Linux>
(luckily you're actually 0% hosed as the spi flash is socketed)
<rqou>
oh and the address bus is only 31 bits on it so if you set up your dma wrong it breaks
<TD-Linux>
kc8apf, probably they then don't have the ahb accessible?
<kc8apf>
if they run upstream OpenBMC, AHB mapping got turned off ~1.5 years ago
<TD-Linux>
it is upstream afaik. cool.
<kc8apf>
now there is a daemon that mimics LPC flash
<TD-Linux>
is there anything cool I can do with openbmc other than boot the system?
<kc8apf>
and the host firmware flash part should have a filesystem
<kc8apf>
it's a full linux system. there's lots of cool things
<TD-Linux>
is the lpc that openbmc sees entirely unmasked?
<kc8apf>
sort-of
<TD-Linux>
can I emulate a sound blaster 16 on openbmc
<kc8apf>
yeah, you probably could
<kc8apf>
but power9 doesn't have an LPC connection
<kc8apf>
they hacked it in firmware on power8
<rqou>
are there "modern" MIPS systems?
<kc8apf>
power9 talks to the BMC over spi IIRC
<rqou>
that aren't embedded
<TD-Linux>
rqou, no
<TD-Linux>
afaik mips hasn't made any new cores of any value in >10 years
<rqou>
don't let azonenberg_work hear that :P
<kc8apf>
if you get an older intel board with an aspeed ast2400 on it, we could do SB16 over LPC
<TD-Linux>
I'd love to see otherwise :)
<rqou>
azonenberg_work really likes the pic32
<azonenberg_work>
i like the idea
<rqou>
(yes, it's still embedded)
<azonenberg_work>
the implementation is awful
<TD-Linux>
I mean there's loongson and ingenic but those are third party cores
<kc8apf>
benh had a functional usb gadget driver a while back. if they finished it up, you can do fun things like have the BMC be a USB ethernet interface to the host
<kc8apf>
or a mass storage device
<kc8apf>
the intended use is keyboard, mouse, and CDROMs emulation but the hardware will do anything
<rqou>
wait, this is x86 or power?
<kc8apf>
yes
<rqou>
troll suggestion: trap _everything_ and make it work like a pc98 :P
<kc8apf>
it's part of the BMC hardware
<kc8apf>
Aspeed AST2400/2500 and Nuvoton WPMC450 and NPCM750 all have usb slave controllers that look like USB hubs
<rqou>
so is it actually possible to trap enough access to make the system look like a pc98?
<kc8apf>
that's how VNC keyboard and mouse work
<TD-Linux>
rqou, I thought about that but the answer is no
<TD-Linux>
because pc98 firmware is also different
<kc8apf>
I know nothing of pc98
<rqou>
yeah me neither
<kc8apf>
BMC are fun devices though
<TD-Linux>
pc98 is alternate universe x86
<TD-Linux>
much like ps4
<rqou>
somehow "systems-level" docs for pc98 are also really rare
<TD-Linux>
they are common but you have to speak moon
<kc8apf>
remote access support means lots of interesting ports are hooked into the BMC
<openfpga-github>
Glasgow/master 23699df whitequark: cli: we're up to revB, yay!
<whitequark>
cursed
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<cr1901_modern>
Reminds me of the USB-to-ISA adapters that don't work
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<cr1901_modern>
At least this is more of a bus "extender" rather than a bus converter
<daveshah>
cr1901_modern: You could in theory build a USB 3 to PCIe adapter with a USB3382, although of course custom drivers would be needed for the card (making it almost useless)
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<cr1901_modern>
daveshah: The same issue w/ USB to ISA adapter. None of your old ISA cards will work out of the box b/c I'm pretty sure a USB controller isn't going to intercept old port-mapped I/O meant for the the cards. You could embed the port mapped I/O into the USB stream, but none of the standard drivers will work
<whitequark>
cr1901_modern: you could intercept that I/O with SMM
<awygle>
that's kind of an amazing device
<whitequark>
cr1901_modern: or more easily, run the old OS in qemu and forward everything from there
<whitequark>
which is essentially the same thing
<cr1901_modern>
whitequark: I'll take your word for it re: SMM. I wouldn't know how to do that.
<cr1901_modern>
Ahhh
<whitequark>
I mean that's how USB keyboards work with software that pokes PS/2 registers
<whitequark>
the firmware implements an EHCI driver
<whitequark>
and a PS/2 emulator
<whitequark>
kind of cursed too
<cr1901_modern>
I can only imagine LOL
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<gruetzkopf>
the expresscard variant is the only of that kind of product i'd use
<gruetzkopf>
also waay overpriced, mine cost me less than 3€ per to make
<pie_>
i thought you just straight plugged the wires in lol
<gruetzkopf>
i sacrificed a 2€ esata card and grabbed a connector from $shop
<awygle>
hmm, question for the room - does even mode / common mode impedance matter if you are only driving a pair differentially?
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<awygle>
i guess there *is* a common mode component to unipolar differential signals... hm.
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<awygle>
okay, i'm pretty sure the CM impedance isn't important because the CM signal should be ~DC, so it won't see TL effects and doesn't really care about impedance. in case anyone was wondering lol
<cr1901_modern>
I never really got that far. It's been 8 years since I've seen a Smith chart
<awygle>
smith charts are bummers
<awygle>
imo
<awygle>
kind of like that one controls thing, what's it called.... root-locus plots
<awygle>
"this is the thing we used before computers could do math, but you have to learn it because... reasons."
<cr1901_modern>
I don't remember how to use them. Even a network analyzer, there's a calibration step you always have to do w/ the connector and I don't remember how/why it works
<awygle>
basically just subtracting stuff you don't care about so the instrument will only show you what you do care about
<cr1901_modern>
right but I don't remember why it works; I recall you calibrate while nothing except one side of the cable connector is attached. But when you attach the cable and the _other_ connector, isn't there an impedance mismatch between the two mating sides of the connector anyway?
<cr1901_modern>
This is also one reason I have trouble w/ RF PCBs- I don't know how to calculate impedance mismatch due to "PCB trace-to-connector" impedance change.
<awygle>
you can do both kinds of calibration, "open" and "through". usually you _want_ to see the mismatch between the two mating sides of the connector, and usually it's small
<cr1901_modern>
awygle: Remind me to ask you more about this when I have time :). I have errands to run sadly. But good to know I at least remember bits and pieces of it correctly
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<awygle>
cr1901_modern: sure :)
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<awygle>
this is the third time this week i've had to decompile something i wrote to extract a function that i somehow lost the source code to....
<lain>
d'oh
<awygle>
not my proudest moment(s) lol
<qu1j0t3>
:/
<qu1j0t3>
you don't use version control on your own stuff?
<awygle>
i do, i just somehow.... didn't commit this? idk
<awygle>
i think i had to swap to another branch real quick and got overly aggressive with "git stash" when it didn't just work immediately
<qu1j0t3>
ah yeah git reset --hard has killed me a few times
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<implr>
rqou: >occasionally mess with these legacy-but-not-enough-to-be-a-huge-pain-to-interface-with systems
<implr>
yeah, we recently got a sparc t2 and that was an interesting experience
<implr>
decent compute, takes regular ddr2 so we filled it up to 32G, has 4x e1000 plus plenty pcie lanes
<implr>
but almost every distro dropped support and a decent portion of software I tried doesn't compile
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<rqou>
yeah, these systems are both interesting and kinda frustrating
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<rqou>
it's a very different experience than playing with eproms and 5 inch floppy disks
<gruetzkopf>
i do have a sun t2000
<gruetzkopf>
fun machine
<Zorix>
i had one for a while at work
<gruetzkopf>
also have 90s big iron mips64
<gruetzkopf>
and ofc powermac g5 with its PPC970 "power4 plus altivec"
<Zorix>
you dont have retro cred unless you have several commodore machines heh
<rqou>
i do have a commodore machine
<rqou>
it's a pain to interface with
<Zorix>
easier these days, lot of options
<cr1901_modern>
I have a VIC-20, but there's really nothing I can do w/ it at present
<TAL>
a VIC (from MOS, not Commodore) would be a great starting point to build an IC replacement for
<gruetzkopf>
about a cubic meter of sparc32
<Zorix>
making replacement MOS/CSG chips is on my long term to do list
<Zorix>
course i want it to be in PDIP and PLCC original packaging
<cr1901_modern>
I want in on that
<gruetzkopf>
do buster v11
<Zorix>
yea buster v11 is a good idea
<Zorix>
my current project involves ata/atapi
<cr1901_modern>
you're doing an ata asic?
<gruetzkopf>
and a stack of more or less interesting x86 stuff
<cr1901_modern>
Bring back the 286
<gruetzkopf>
386 with 256MiB ram
<gruetzkopf>
serial 17
<cr1901_modern>
serial 17?
<Zorix>
im going to make a board that replaces atapi cdrom drives in old computers so it can take disc images and become the atapi device
<gruetzkopf>
of that board
<cr1901_modern>
Wait, there actually _was_ a 386 that accepted 256MiB of RAM?
<cr1901_modern>
plus corresponding chipset*
<gruetzkopf>
"chipset"
<gruetzkopf>
all PLDs
<gruetzkopf>
16*16MiB SIMM
<TD-Linux>
Zorix, would b neat
<cr1901_modern>
gruetzkopf: ? There were 386 chipsets. There were 286 chipsets too (NEAT from Chips and Technologies)
* qu1j0t3
did a client side ATAPI impl for PIC18
<gruetzkopf>
yeah, but not on this board
<rqou>
Zorix: uh, isn't that exactly lain's product?
<cr1901_modern>
so it had two discrete 8237s, two 8259s, an 8253?
<Zorix>
rqou, no idea, dont know anyone else's project
<Zorix>
im only doing it because im tired of waiting for someone else to do it, and it gives me an excuse to learn hardware development
<gruetzkopf>
yes, plus memory controller in PLDs
<cr1901_modern>
gruetzkopf: Can I see it :o?
<rqou>
wait gruetzkopf a weird 386 board full of PLDs?
<gruetzkopf>
industrial control stuff
<rqou>
oh nvm
<rqou>
i was thinking Everex
<gruetzkopf>
it's also a ISA card in a passive plane
<cr1901_modern>
Do you have a photo?
<gruetzkopf>
it's deep down in the stack :|
<cr1901_modern>
286 with all DIPs/discrete components is "normal"; well, the IBM AT is such a board anyway
<cr1901_modern>
And there's a few clones w/ all DIPs too
<TAL>
ya, 386 really had more or less two eras
<cr1901_modern>
but I'm not sure I've ever seen a 386 with discrete MCS-85 parts
<cr1901_modern>
TAL: Well, the 386 came out the year after the IBM AT; it's _plausible_ that ppl designed totally discrete motherboards around it.
<cr1901_modern>
I've never seen one of course
<lain>
Zorix: my product is similar, but it's USB instead of ATAPI: https://isostick.com
<cr1901_modern>
The memory controller PLD on gruetzkopf's board was probably for convenience; the AT's "memory controller" is discrete TTL
<cr1901_modern>
and a delay line
<cr1901_modern>
gruetzkopf: Are the 8237s/8259s PLCC packages?
<cr1901_modern>
on this industrial board
<gruetzkopf>
most of it is iirc
<Zorix>
lain, i think i have seen that before, neat
<lain>
:3
<gruetzkopf>
else there'd be no chance to get it on a full-length ISA card together with FDC, ATA, par/ser and keyboard and the 16 simms
<awygle>
lain: wow, cool. I could have used this on Monday lol
<cr1901_modern>
gruetzkopf: That's why I would've thought it used a chipset that combines the DMA controller, interrupt controller, times, etc into a single chip
<cr1901_modern>
instead of using discrete chips for that
<lain>
awygle: I need to get sales back up lol, switched to manufacturing them in-house and then another project came up and I haven't had time to finish tuning the reflow process :x
<lain>
soon™
<awygle>
haha
<awygle>
#relatable
<gruetzkopf>
i have a slightly older related model
<gruetzkopf>
only 8 slots, and ST508 instead of AT
<lain>
unrelated: fcc pls post my callsign so I can derp around with transmit