sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub148> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fkw
<GitHub148> migen/master 496edde Sebastien Bourdeauducq: sayma_amc: add SMA IO pins
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<bb-m-labs> build #173 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/173
<GitHub176> [artiq] sbourdeauducq pushed 2 new commits to master: https://github.com/m-labs/artiq/compare/2a91b6996fa9...ac83bfbd8ed6
<GitHub176> artiq/master ac83bfb Sebastien Bourdeauducq: runtime: add support for targets without SPI flash
<GitHub176> artiq/master 1dab7df Sebastien Bourdeauducq: kc705_sma_spi: fix permissions
<GitHub0> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fIo
<GitHub0> migen/master 6c43bb3 Sebastien Bourdeauducq: sayma_amc: fix Ethernet I/O voltage
<bb-m-labs> build #174 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/174
<GitHub155> [artiq] sbourdeauducq created sinara (+1 new commit): https://github.com/m-labs/artiq/commit/bee4902323d7
<GitHub155> artiq/sinara bee4902 Sebastien Bourdeauducq: add Sayma AMC standalone target
<bb-m-labs> build #749 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/749
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<sb0> _florent_, any idea why rgmii ethernet doesn't work?
<bb-m-labs> build #549 of artiq-win64-test is complete: Warnings [warnings coveralls_upload] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/549 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<bb-m-labs> build #1648 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1648
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<GitHub30> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5ftb
<GitHub30> misoc/master 1dd3a43 Sebastien Bourdeauducq: liteeth: clean up rgmii clocking
<sb0> _florent_, does liteeth just drop packet with an invalid crc/preamble?
<bb-m-labs> build #233 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/233
<GitHub106> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fq3
<GitHub106> misoc/master 0130cd6 Sebastien Bourdeauducq: liteeth: clean up CSR collection code
<sb0> did someone fix conda or did that bug disappeared just like it appeared?
<bb-m-labs> build #234 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/234
<GitHub89> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fqB
<GitHub89> misoc/master bbcf121 Sebastien Bourdeauducq: Revert "liteeth: clean up CSR collection code"...
<bb-m-labs> build #235 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/235
<GitHub146> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fmm
<GitHub146> misoc/master 25f9044 Sebastien Bourdeauducq: liteeth: clean up rgmii rx_ctl handling
<bb-m-labs> build #236 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/236
<GitHub4> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fmV
<GitHub4> migen/master 38fe2f9 Sebastien Bourdeauducq: sayma_amc: add MDIO signals
<GitHub49> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fmM
<GitHub49> misoc/master e03b80a Sebastien Bourdeauducq: sayma_amc: drive MDC low
<bb-m-labs> build #175 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/175
<bb-m-labs> build #237 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/237
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<GitHub71> [artiq] sbourdeauducq commented on issue #800: @jordens Can the script above be put into an OpenOCD target file for Sayma? Can it be submitted upstream? https://github.com/m-labs/artiq/issues/800#issuecomment-323610320
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<GitHub82> [artiq] sbourdeauducq pushed 1 new commit to sinara: https://github.com/m-labs/artiq/commit/9f4c9fc14b22df8534ff9f9836ce6f63465be7f3
<GitHub82> artiq/sinara 9f4c9fc Sebastien Bourdeauducq: artiq_flash: Sayma support
<GitHub47> [misoc] sbourdeauducq pushed 3 new commits to master: https://git.io/v5fBa
<GitHub47> misoc/master 784ffb6 Sebastien Bourdeauducq: sayma_amc: add spiflash
<GitHub47> misoc/master b6db9c2 Sebastien Bourdeauducq: kc705: cleanup csr_devices
<GitHub47> misoc/master ee77c41 Sebastien Bourdeauducq: sayma_amc: use standard MiSoC support for value-less config options
<bb-m-labs> build #238 of misoc is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/238 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub163> [artiq] jordens commented on issue #800: A lot of the openocd wrapper functions need rewriting to support multiple TAPs and multiple flashes. Then yes. https://github.com/m-labs/artiq/issues/800#issuecomment-323613908
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<GitHub86> [artiq] sbourdeauducq pushed 2 new commits to sinara: https://github.com/m-labs/artiq/compare/9f4c9fc14b22...e94d0803e117
<GitHub86> artiq/sinara e94d080 Sebastien Bourdeauducq: artiq_flash: fix Sayma load addresses
<GitHub86> artiq/sinara 261b6fb Sebastien Bourdeauducq: artiq_flash: fix AMC_DR_LEN
<GitHub176> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fEz
<GitHub176> misoc/master 7ee4836 Sebastien Bourdeauducq: sayma_amc: fix flash_boot_address
<bb-m-labs> build #239 of misoc is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/239 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
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<GitHub116> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fzc
<GitHub116> migen/master f392ad2 Sebastien Bourdeauducq: migen: add second SPI flash, RTM serial, and second serial
<GitHub131> [artiq] sbourdeauducq pushed 1 new commit to sinara: https://github.com/m-labs/artiq/commit/d6b624dfbe7afd5742d2de88e1457efe583e22cd
<GitHub131> artiq/sinara d6b624d Sebastien Bourdeauducq: sayma_amc: connect RTM serial and second serial
<bb-m-labs> build #176 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/176
<GitHub73> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fzd
<GitHub73> migen/master 26da349 Sebastien Bourdeauducq: sayma_amc: fix RTM serial voltage
<bb-m-labs> build #177 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/177
<GitHub191> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fgc
<GitHub191> migen/master 0f78f9f Sebastien Bourdeauducq: sayma_amc: fix FTDI UART I/O voltage
<bb-m-labs> build #178 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/178
<GitHub152> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5fga
<GitHub152> migen/master 245a3b9 Sebastien Bourdeauducq: sayma_amc: fix more I/O voltages
<sb0> _florent_, why did you use 1.8V everywhere? that's not correct.
<bb-m-labs> build #179 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/179