sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub181> [smoltcp] whitequark pushed 1 new commit to master: https://git.io/v5lJW
<GitHub181> smoltcp/master f76b4be whitequark: Dispatch a TCP ACK every time window increases at all....
<travis-ci> m-labs/smoltcp#198 (master - f76b4be : whitequark): The build passed.
<sb0> whitequark, pong
<sb0> good to have you back! :)
<sb0> there's also TCP keepalive for 3.0
<whitequark> oh I'm not all done, sec
<sb0> whitequark, btw what power supplies and atx connectors did you order for sayma?
<sb0> and are they in the lab already?
<whitequark> sb0: oh I decided to just go to SSP and grab the video card power adaptors alongside the media converter
<whitequark> that's the absolute easiest variant, no fancy expensive power supply to order
<sb0> okay. there is a 12V 5A power supply on the table, should be enough for 3 cards without RTM
<whitequark> those video card power adaptors attach to 4-pin molex or sata power connectors from the other side
<whitequark> so any regular ATX PSU works
<whitequark> I don't want to bother wiring anything, I'll just grab one alongside
<sb0> you'll have to wire stuff to make the PSU start
<whitequark> well I suppose I'll manage to use a whole one jumper
<sb0> and are those PSUs happy with a load on 12V only?
<whitequark> sure
<sb0> well that's pretty far from normal operation
<whitequark> typically rated at far higher than 5A@12V anyway because that's what the video cards and hard drives suck most power from
<whitequark> if you insist I can go the other way but this seems safer to me, these PSUs are probably some of the widest tested ones
<GitHub138> [artiq] whitequark commented on issue #685: @dhslichter You wanted an order of magnitude faster? Well, how about ~2.2 MB/s? The throughput graph looks like this now. I believe it's limited by TCP Slow Start at the very beginning:... https://github.com/m-labs/artiq/issues/685#issuecomment-326161749
<whitequark> sb0: ^
<sb0> ok, well I'm fine with ATX if it really works correctly
<GitHub137> [artiq] whitequark pushed 2 new commits to master: https://github.com/m-labs/artiq/compare/f26e698f31e3...20f43d579283
<GitHub137> artiq/master 20f43d5 whitequark: firmware: fix ethmac MTU value....
<GitHub137> artiq/master 737c104 whitequark: firmware: update smoltcp.
<whitequark> those ATX supplies are really very resilient, you can do crazy shit with them like connecting two in series and powering a load like a Tesla coil, they eat it and feel fine
<sb0> I'm just worried about some cheap design going out of regulation due to the unusually unbalanced loads and causing some damage, especially when combined the high current capability you mention
<whitequark> well I'm not going to buy the cheapest supply SSP can offer, right?
<whitequark> hm
<bb-m-labs> build #760 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/760
<bb-m-labs> build #559 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/559
<bb-m-labs> build #1660 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1660
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<GitHub137> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5lsG
<GitHub137> misoc/master 166a437 Sebastien Bourdeauducq: spi: support combining multiple buses into one
<bb-m-labs> build #243 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/243
<GitHub167> [artiq] sbourdeauducq pushed 4 new commits to sinara: https://github.com/m-labs/artiq/compare/660f9856ec1f...e6522212216a
<GitHub167> artiq/sinara f765dc5 Sebastien Bourdeauducq: sayma_rtm: do not keep DACs in reset
<GitHub167> artiq/sinara ad0a940 Sebastien Bourdeauducq: sayma_rtm: hook up DAC SPI
<GitHub167> artiq/sinara a676593 Sebastien Bourdeauducq: sayma: clean up serwb comments
<sb0> bb-m-labs: force build --branch=sinara artiq
<bb-m-labs> build forced [ETA 31m11s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #761 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/761
<bb-m-labs> build #1661 of artiq is complete: Failure [failed artiq_flash] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1661
<GitHub182> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5lG3
<GitHub182> misoc/master 3bd95ce Sebastien Bourdeauducq: spi: fix handling of half-duplex+multi-bus combination
<sb0> bb-m-labs: force build --branch=sinara artiq
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<GitHub16> [artiq] sbourdeauducq pushed 2 new commits to sinara: https://github.com/m-labs/artiq/compare/e6522212216a...5a041c24f321
<GitHub16> artiq/sinara 5a041c2 Sebastien Bourdeauducq: conda: bump misoc
<GitHub16> artiq/sinara d92cca9 Sebastien Bourdeauducq: artiq_flash: fix target_file handling
<bb-m-labs> build #244 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/244
<bb-m-labs> build forced [ETA 31m11s]
<bb-m-labs> I'll give a shout when the build finishes
<GitHub128> [sinara] gkasprow pushed 3 new commits to master: https://github.com/m-labs/sinara/compare/bd01541494d3...37a35f27c096
<GitHub128> sinara/master 37a35f2 Greg: Merge branch 'master' of https://github.com/m-labs/sinara...
<GitHub128> sinara/master 3004eec Greg: stash
<GitHub128> sinara/master 5371dbc Greg: added AMC and RTM panels design files
<bb-m-labs> build #762 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/762
<bb-m-labs> build #560 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/560
<bb-m-labs> build #1662 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1662
<GitHub7> [artiq] sbourdeauducq pushed 3 new commits to sinara: https://github.com/m-labs/artiq/compare/5a041c24f321...0a5904bbaa21
<GitHub7> artiq/sinara 0a5904b Sebastien Bourdeauducq: firmware: support for multiple JESD DACs
<GitHub7> artiq/sinara a4144a0 Sebastien Bourdeauducq: sayma_amc: add converter SPI config defines
<GitHub7> artiq/sinara bacf8a1 Sebastien Bourdeauducq: style
<sb0> rjo, I'll let you refactor the AD9154 and AD9154JESD classes that are currently in phaser.py and I believe need some cleanup and reorganization, and put the equivalent code in sayma_amc_standalone.py
<GitHub153> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5lnK
<GitHub153> misoc/master 30e5e79 Sebastien Bourdeauducq: cpu_interface: export CSR size instead of number of buswords in CSV
<bb-m-labs> build #245 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/245
<GitHub20> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5lnx
<GitHub20> misoc/master c5edcd0 Sebastien Bourdeauducq: cpu_interface: determine Rust types on CSR size, not number of bus words
<GitHub43> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5lnp
<GitHub43> misoc/master 7d59ec3 Sebastien Bourdeauducq: cpu_interface: eliminate 'bool' Rust type...
<bb-m-labs> build #246 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/246
<bb-m-labs> build #247 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/247
<sb0> bb-m-labs: force build --branch=sinara artiq
<bb-m-labs> build forced [ETA 32m46s]
<bb-m-labs> I'll give a shout when the build finishes
<GitHub65> [artiq] sbourdeauducq pushed 4 new commits to sinara: https://github.com/m-labs/artiq/compare/0a5904bbaa21...c5fe2799cf4c
<GitHub65> artiq/sinara b609366 Sebastien Bourdeauducq: runtime: fix Rust types in RTIO...
<GitHub65> artiq/sinara 44edba0 Sebastien Bourdeauducq: firmware: add placeholder code for HMC830/7043 initialization
<GitHub65> artiq/sinara 9edff2c Sebastien Bourdeauducq: remote_csr: interpret length as CSR size, not number of bus words
<sb0> _florent_, you should be able to put the clocking code here, simply referencing csr::converter_spi (see ad* files in the same folder), and it should traverse the bridge etc.
<sb0> of course assuming the bridge works etc. which is quite unlikely, probably there will be a couple other yaks to shave there
<GitHub143> [artiq] sbourdeauducq closed issue #727: remove multiple jesd initialization attempts if not necessary https://github.com/m-labs/artiq/issues/727
<sb0> rjo, re. the AD9154 CSR group, the order of the group should be the same as the order of the CS SPI lines
<bb-m-labs> build #763 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/763
<bb-m-labs> build #1663 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1663
<sb0> bb-m-labs: force build --branch=release-2 artiq
<bb-m-labs> build forced [ETA 32m46s]
<bb-m-labs> I'll give a shout when the build finishes
<GitHub15> [migen] sbourdeauducq pushed 1 new commit to master: https://git.io/v5lCa
<GitHub15> migen/master d63662a Sebastien Bourdeauducq: sayma_amc: fix SPI flash I/O voltage
<sb0> bb-m-labs: force build --branch=sinara artiq
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<bb-m-labs> build #186 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/186
<bb-m-labs> build #764 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/764
<bb-m-labs> build #561 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/561
<bb-m-labs> build #1664 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1664
<bb-m-labs> build forced [ETA 30m19s]
<bb-m-labs> I'll give a shout when the build finishes
<rjo> sb0: ack
<bb-m-labs> build #765 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/765
<bb-m-labs> build #562 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/562
<bb-m-labs> build #1665 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1665
<travis-ci> batonius/smoltcp#57 (master - f76b4be : whitequark): The build passed.
<travis-ci> batonius/smoltcp#58 (expandable_ring_buffer - 3da43fe : Egor Karavaev): The build passed.
<GitHub62> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v5l4j
<GitHub62> misoc/master 5b02c49 Sebastien Bourdeauducq: spi: remove unnecessary imports
<bb-m-labs> build #248 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/248
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<GitHub164> [smoltcp] whitequark pushed 1 new commit to master: https://git.io/v5lar
<GitHub164> smoltcp/master 49ed4ae whitequark: Add a TCP data source endpoint to the server example.
<travis-ci> m-labs/smoltcp#200 (master - 49ed4ae : whitequark): The build passed.
<whitequark> sb0: ok, going to SSP now
<whitequark> sb0: ah sorry looks like I won't make it to SSP in time today, it closes at 1900...
<whitequark> it's 0200 over in the US though so I suppose next morning is just as good
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<GitHub58> [artiq] whitequark commented on issue #685: @dhslichter You wanted an order of magnitude faster? Well, how about ~2.2 MB/s? The throughput graph looks like this now. I believe it's limited by TCP Slow Start at the very beginning:... https://github.com/m-labs/artiq/issues/685#issuecomment-326161749
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<key2> hey, what would be an easy way to have multiple FPGA bistream in a SPI nor flash, and chose from the fpga on which one to reboot ?
<cr1901_modern> key2: ice40 has a COLDBOOT/WARMBOOT primitive. Maybe that could give you ideas
<cr1901_modern> (well it's called SB_WARMBOOT*)
<key2> yeah but am on xilinx 7 series
<cr1901_modern> key2: Oh, I don't know the primitives for Xilinx, but they must exist
<GitHub19> [smoltcp] whitequark pushed 2 new commits to master: https://git.io/v58vF
<GitHub19> smoltcp/master 7e2dc1a whitequark: Allow querying the size of the TCP transmit and receive buffers....
<GitHub19> smoltcp/master b6f7529 whitequark: TCP socket debug messages "sending <flags>" should be at DEBUG level....
<travis-ci> m-labs/smoltcp#201 (master - 7e2dc1a : whitequark): The build passed.
<GitHub27> [artiq] whitequark pushed 3 new commits to master: https://github.com/m-labs/artiq/compare/20f43d579283...74b7010d676c
<GitHub27> artiq/master 74b7010 whitequark: runtime: allow safely pulling logs even on TRACE log level....
<GitHub27> artiq/master c9e2a08 whitequark: logging, aqctl_corelog: recognize log level TRACE.
<GitHub27> artiq/master 4883eea whitequark: libproto: simplify (NFC).
<GitHub165> [artiq] cjbe commented on issue #685: @whitequark I just tried 3.0.dev+1303.gc5fe2799 and I still see very low throughput with continuously increasing retransmit delays.... https://github.com/m-labs/artiq/issues/685#issuecomment-326312456
<GitHub16> [artiq] whitequark commented on issue #685: @dhslichter You wanted an order of magnitude faster? Well, how about ~2.2 MB/s? The throughput graph looks like this now. I believe it's limited by TCP Slow Start at the very beginning:... https://github.com/m-labs/artiq/issues/685#issuecomment-326161749
<GitHub132> [smoltcp] whitequark pushed 2 new commits to master: https://git.io/v583X
<GitHub132> smoltcp/master fac42e9 whitequark: Fix an inaccurate comment.
<GitHub132> smoltcp/master 01021e4 whitequark: Fix an unused import warning.
<bb-m-labs> build #766 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/766
<GitHub112> [artiq] whitequark commented on issue #685: @cjbe No wonder, commit c5fe2799 does not include any of the fixes I added to master... https://github.com/m-labs/artiq/issues/685#issuecomment-326317818
<bb-m-labs> build #563 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/563
<bb-m-labs> build #1666 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1666
<GitHub68> [artiq] cjbe commented on issue #685: Ooops - that build (which conda install gave me) was from the sinara branch, hence does not have the latest fixes. Despite that, using 3.0.dev+1280.g20f43d57 I see the same problem. ... https://github.com/m-labs/artiq/issues/685#issuecomment-326318264
<GitHub143> [artiq] whitequark commented on issue #685: @cjbe What is the OS used on the host machine? https://github.com/m-labs/artiq/issues/685#issuecomment-326321091
<GitHub5> [artiq] cjbe commented on issue #685: Linux (3.19.0-84-generic) https://github.com/m-labs/artiq/issues/685#issuecomment-326323625
<GitHub137> [artiq] jordens commented on issue #685: @whitequark Good work on smoltcp!... https://github.com/m-labs/artiq/issues/685#issuecomment-326326960
<GitHub22> [artiq] whitequark commented on issue #685: @jordens No timeouts (those go into the log at WARN level, easily noticeable). The quiet periods are all on the host side. One of them is the compiler latency, the other I'm not sure. https://github.com/m-labs/artiq/issues/685#issuecomment-326329190
<GitHub38> [artiq] whitequark commented on issue #685: @jordens No timeouts (retransmissions on the transmit side and out-of-order packets on the receive side go into the log at WARN level, easily noticeable). The quiet periods are all on the host side. One of them is the compiler latency, the other I'm not sure. https://github.com/m-labs/artiq/issues/685#issuecomment-326329190
<GitHub46> [artiq] jbqubit commented on commit c0eb2ad: Thanks. Glad the much simplified workflow is now documented. https://github.com/m-labs/artiq/commit/c0eb2ad0b7570e1f82019f9f3a4d3eed342a3b2e#commitcomment-24002407
<rjo> anybody need a 34c3 presale voucher?
<GitHub4> [artiq] jbqubit commented on commit 7951e8f: Consider deleting the first sentence — it’s confusing. Second sentence suffices to explain what /is/ required. https://github.com/m-labs/artiq/commit/7951e8f58a8ace3f38cae86cb32c4cc0f64bd83b#commitcomment-24002680
<rjo> whitequark: could you send me the packet dump?
<GitHub22> [artiq] whitequark commented on issue #685: @jordens Actually, I'm not sure why the graph above is so pessimistic. Here I ran three kernels in rapid succession. It takes about 9ms from the end of one kernel to the start of another. No 200 ms quiet periods:... https://github.com/m-labs/artiq/issues/685#issuecomment-326334617
<whitequark> rjo: updated
<GitHub126> [artiq] whitequark commented on issue #685: @jordens Actually, I'm not sure why the graph above is so pessimistic. Here I ran three kernels in rapid succession. It takes about 9ms from the end of one kernel to the start of another. No 200 ms quiet periods:... https://github.com/m-labs/artiq/issues/685#issuecomment-326334617
<GitHub116> [artiq] jordens commented on issue #685: @whitequark ack. i thought they were raw transfers with fast source and and discard sink. https://github.com/m-labs/artiq/issues/685#issuecomment-326335693
<GitHub17> [artiq] whitequark commented on issue #685: @jordens Actually, I'm not sure why the graph above is so pessimistic. Here I ran three kernels in rapid succession. It takes about 9ms from the end of one kernel to the start of another. No 200 ms quiet periods:... https://github.com/m-labs/artiq/issues/685#issuecomment-326334617
<whitequark> rjo: looks like cjbe's machine does not do fast retransmit.
<whitequark> which is bizarre.
<GitHub28> [artiq] jordens commented on commit 7951e8f: No. They describe to very different statements. The first one tackles a common misconception. https://github.com/m-labs/artiq/commit/7951e8f58a8ace3f38cae86cb32c4cc0f64bd83b#commitcomment-24002821
<whitequark> I send four duplicate ACKs and all I get back is exponential timeout
<rjo> whitequark: i have never seen that.
<whitequark> rjo: look at his dump
<rjo> ah. i missed that
<rjo> whitequark: packet 113 is a fast retransmit.
<rjo> it falls apart after that.
<GitHub126> [smoltcp] steffengy commented on issue #36: To clarify, since it wasn't really clearly worded:... https://git.io/v58RY
<GitHub163> [smoltcp] whitequark commented on issue #36: Yeah, I understood. I haven't had time to flesh out the ideas I had, hence the silence. https://git.io/v58RB
<whitequark> rjo: why though?
<whitequark> why doesn't e.g. packet 170 trigger fast retransmit
<rjo> whitequark: do you also get those out-of-order packets on your machine (121, 138, 139 etc)?
<GitHub187> [artiq] jbqubit commented on commit 7951e8f: Clarification... ... https://github.com/m-labs/artiq/commit/7951e8f58a8ace3f38cae86cb32c4cc0f64bd83b#commitcomment-24003362
<whitequark> rjo: I have never observed any behavior that was quite like this
<whitequark> the worst I have seen is fast retransmit being triggered repeatedly, wasting three packets every ten or so
<GitHub89> [artiq] jbqubit commented on issue #813: Ping @gkasprow https://github.com/m-labs/artiq/issues/813#issuecomment-326345098
<GitHub14> [artiq] jordens commented on commit 7951e8f: You added at least one error and two ill-defined words. https://github.com/m-labs/artiq/commit/7951e8f58a8ace3f38cae86cb32c4cc0f64bd83b#commitcomment-24003444
<rjo> whitequark: i wonder what the proper behavior is if you are only strictly handling packets in order. don't you need to quench the window or something like that?
<whitequark> quench?
<rjo> shrink
<GitHub182> [artiq] jordens commented on commit 7951e8f: Is "If you modify ARTIQ, there is not requirement to distribute the modified version. Only when distributing it, the complete corresponding source code needs to be made available." less confusing to you? https://github.com/m-labs/artiq/commit/7951e8f58a8ace3f38cae86cb32c4cc0f64bd83b#commitcomment-24003534
<rjo> since with duplicate acks (for fast retransmit) you can at most signal the loss of "the next" packet, the other side still needs to painfully figure out that you have not accepted any of the the following packets.
<whitequark> I don't signal SACK so what's the difference?
<whitequark> if it doesn't retransmit "the next" packet we will get nowhere
<rjo> so it tries to do to things at once, feed you lost packets at the low end of the window and continue feeding at the "far" end of the window.
<whitequark> hmm
<rjo> but that is just a wild guess and i am shaky on tcp.
<GitHub168> [smoltcp] whitequark pushed 1 new commit to master: https://git.io/v58uz
<GitHub168> smoltcp/master 017210e whitequark: Exhaustion of transmit buffers should not be a reportable error.
<travis-ci> m-labs/smoltcp#203 (master - 017210e : whitequark): The build passed.
<GitHub162> [artiq] whitequark commented on issue #685: > Note that this is only host to core device though, core device to host is still 300 kB/s. [...] I think it might be an artifact in the test.... https://github.com/m-labs/artiq/issues/685#issuecomment-326354879
<whitequark> rjo: so... the only remaining issue AFAICT is this lack of fast retransmit
<whitequark> I might have to rethink window management
<travis-ci> batonius/smoltcp#59 (master - 017210e : whitequark): The build passed.
<whitequark> rjo: amazing
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<whitequark> rjo: very interesting.
<whitequark> I have finally reproduced this specific behavior using smoltcp's fault injector
<whitequark> you can try doing it, if you want:
<whitequark> $ cargo run --example server -- tap0 --shaping-interval 5 --rx-rate-limit 4 --pcap test.pcap
<whitequark> $ socat stdio tcp4-connect:192.168.69.1:6971 </dev/urandom
<whitequark> erm, sorry, --shaping-interval 1.
<whitequark> this is actually the key part.
<whitequark> the fault injector implements a typical token bucket rate limiter, to approximate our situation with buffers.
<whitequark> --rx-rate-limit sets the bucket size in packets.
<whitequark> --shaping-interval sets the interval at which the bucket is refilled (in full)
<whitequark> if the interval is 5ms+ then TCP works just fine, specifically there are fast retransmits and regular retransmits, but no delay over 200ms is ever observed
<whitequark> if the interval is 1ms then there's this exponential behavior
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<travis-ci> batonius/smoltcp#60 (would_accept - f37c650 : Egor Karavaev): The build passed.
<travis-ci> Change view : https://github.com/batonius/smoltcp/compare/3a2030bb1caf^...f37c650562ae
<whitequark> rjo: actually, hm, it's only partially similar
<whitequark> the TCP stack on my Linux installation does a retransmission *every time* I send a duplicate ACK
<whitequark> ah wait, that's just wireshark being weird with its analysis
<GitHub148> [smoltcp] whitequark pushed 1 new commit to master: https://git.io/v54t5
<GitHub148> smoltcp/master dc94c35 whitequark: Unbreak traffic shaper in the fault injector.
<travis-ci> m-labs/smoltcp#204 (master - dc94c35 : whitequark): The build passed.
<travis-ci> batonius/smoltcp#61 (would_accept - d7c5c32 : Egor Karavaev): The build passed.
<whitequark> rjo: ok, indeed it looks like I can reproduce this problem in controlled environment
<GitHub171> [artiq] gkasprow commented on issue #813: @sbourdeauducq This mode would be very slow because only SPIx1 can be used. I tried this approach but didn't manage to configure any of FPGAs. That's why I resoldered resistors and RTM FPGA is loaded directly by AMC FPGA. Another reason could be due to long unterminated stub of config clock. I didn't inverstinage it further because you requested direct configuration in slave mode and I added this Xlinx co
<whitequark> it appears that limiting the size of the receive window to mss * number of packet buffers actually *causes* this
<whitequark> because the sender doesn't get quite enough challenge acks to trigger fast retransmit
<whitequark> but if I raise it, it still shows behavior that includes exponential backoff, just locally
<whitequark> i wonder why didn't lwip trigger this...
<GitHub57> [smoltcp] batonius opened issue #37: The `ping` example is currently broken. https://git.io/v543l
<GitHub79> [artiq] sbourdeauducq commented on issue #813: > This mode would be very slow because only SPIx1 can be used... https://github.com/m-labs/artiq/issues/813#issuecomment-326443042
<GitHub165> [smoltcp] batonius opened pull request #38: Refactor Socket::process into Socket::would_accept and Socket::process_accepted (master...would_accept) https://git.io/v54WG
<GitHub30> [artiq] arpitagrawal23 commented on issue #820: Hi... https://github.com/m-labs/artiq/issues/820#issuecomment-326448875