sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub82> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/v8ERx
<GitHub82> artiq/master e749bae Sebastien Bourdeauducq: package everything to rebuild core device binaries
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<travis-ci> m-labs/artiq#577 (master - e749bae : Sebastien Bourdeauducq): The build passed.
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<GitHub24> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/v8Eos
<GitHub24> artiq/master 3c63e5b Sebastien Bourdeauducq: runtime/liblwip: fix symbolic link creation
<GitHub24> artiq/master 5941623 Sebastien Bourdeauducq: use versioneer
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<sb0> why of course, versioneer broke include_package_data
<sb0> god is setuptools a pile of shit
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<travis-ci> m-labs/artiq#578 (master - 5941623 : Sebastien Bourdeauducq): The build passed.
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<GitHub4> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/v8EDH
<GitHub4> artiq/master 2df2e14 Sebastien Bourdeauducq: update versioneer
<GitHub147> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/v8EHW
<GitHub147> artiq/master 44c0c61 Sebastien Bourdeauducq: master/worker: add ARTIQ version to HDF5 output
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<travis-ci> m-labs/artiq#579 (master - 2df2e14 : Sebastien Bourdeauducq): The build has errored.
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<travis-ci> m-labs/artiq#580 (master - 44c0c61 : Sebastien Bourdeauducq): The build has errored.
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<GitHub167> [misoc] whitequark pushed 1 new commit to master: http://git.io/v8uCc
<GitHub167> misoc/master 5e3b61a whitequark: Our libunwind changes were merged upstream.
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<travis-ci> m-labs/misoc#18 (master - 5e3b61a : whitequark): The build passed.
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<sb0> wow, a simple "git pull" worked! this is the first time I see something nontrivial involving submodules that doesn't break...
<GitHub14> [misoc] sbourdeauducq pushed 1 new commit to master: http://git.io/v8uRJ
<GitHub14> misoc/master fd27e95 Forest Crossman: targets: Added Numato Mimas V2 target...
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<travis-ci> m-labs/misoc#19 (master - fd27e95 : Forest Crossman): The build passed.
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<GitHub35> [artiq] whitequark pushed 1 new commit to new-py2llvm: http://git.io/v8uSl
<GitHub35> artiq/new-py2llvm 19fae91 whitequark: compiler.analyses.domination: implement new dominator tree algorithm.
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<GitHub6> [artiq] whitequark pushed 1 new commit to new-py2llvm: http://git.io/v8zLX
<GitHub6> artiq/new-py2llvm 9670939 whitequark: compiler.analyses.domination: fix PostDominatorTree.
<whitequark> *finally*
<whitequark> yep works as intended
<whitequark> control flow wise, to (intuitively) 'skip' an if statement, you need to get an immediate postdominator
<whitequark> this allows the interleave transform to ignore control flow that doesn't include delay functions.
<larsc> sounds great
<whitequark> yeah. it just took me the entire yesterday to figure it out, because i fail at graph theory
<whitequark> or more precisely
<whitequark> i fail at reading and doing exactly what i read
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<sb0> this stuff https://www.picmg.org/spec-product/utc004/ really smells like SAP, OMG, CORBA, Oracle, etc.
<sb0> "enterprise grade Layer 3 switching/routing stack". i'm willing to bet it's ridden with bugs.
<whitequark> it's related to telcos, obviously it's shit
<sb0> Joe wants a micro-TCA based experiment control system
<sb0> so far the only valid argument I have heard is that the PCB traces of the backplane may provide better signal integrity and less noise than floppy cables
<sb0> (they also keep things neatly organized, but i don't expect that many cables...)
<whitequark> can you just design your own backplane? it's a PCB with a few connectors.
<whitequark> use, I dunno, PCI-e ones, they should be good enough
<sb0> there's also power and cooling...
<sb0> whitequark, do you know any good backplane solutions?
<sb0> that support raw high speed signals
<whitequark> hmm ask azonenberg maybe
<sb0> with uTCA, sometimes you need a RTOS just to get your board powered: https://github.com/lnls-dig/afcipm
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