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rjo >
stekern: thanks. git it.
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rjo >
sb0: yes. is sent the timings to the list.
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rjo >
sb0: these large bitstreams are inconvenient...
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rjo >
s/git/got/ and s/is sent/i sent/
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sb0 >
rjo, they take only a few seconds to load here at 30MHz... only writing them to the flash is slow
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sb0 >
rjo, (ddr3) good
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rjo >
sb0: yes. loading is fast. it's building and flashing.
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sb0 >
I didn't know about the iverilog-vpi command
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GitHub133 >
ARTIQ/master 4915b4b Sebastien Bourdeauducq: PEP8
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sb0 >
one of the interesting 'features' of the monsterboard is they added a second USB/serial converter instead of using the one (second channel) already present in the FTDI-chip that does JTAG
09:08
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GitHub121 >
ARTIQ/master 8d7591d Sebastien Bourdeauducq: more PEP8
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<
GitHub121 >
ARTIQ/master 8619343 Sebastien Bourdeauducq: compiler/ir_values: fix gcd64
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rjo_ >
sb0: dunno. i only found iverilog-vpi when looking for ways to tell it where to find modules.
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rjo_ >
hurray for pep8!
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rjo_ >
well. this way you can connect the uart and the jtag to different machines...
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<
GitHub142 >
ARTIQ/master 66af70b Sebastien Bourdeauducq: soc/runtime: resolve compiler_rt symbols in kernel
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GitHub86 >
ARTIQ/master a647e11 Sebastien Bourdeauducq: compiler: split into transforms and py2llvm
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<
GitHub86 >
ARTIQ/master ef1f878 Sebastien Bourdeauducq: devices/runtime: minor cleanup
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