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GitHub103 >
migen/master 09ebcc4 Florent Kermarrec: setup.py: fix README filename
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rjo >
sb0: yes it's gated by the decoded address.
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rjo >
mithro: are you looking into migen/misoc for hdmi2usb?
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GitHub29 >
ARTIQ/master 16b2d9f Sebastien Bourdeauducq: runtime: support real-time FUD
07:37
<
GitHub29 >
ARTIQ/master 813bc90 Sebastien Bourdeauducq: rtio: support readout of counter from software
07:37
<
GitHub29 >
ARTIQ/master b5f145d Sebastien Bourdeauducq: devices: new RTIO driver
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GitHub75 >
ARTIQ/master 6861d28 Sebastien Bourdeauducq: runtime: support arbitrarily long initial DDS setup time
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<
sb0 >
rjo, how should we deal with the fact that the FUD resolution (8ns) is lower than the RTIO resolution (1ns)? silently round time to the nearest FUD step?
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GitHub175 >
misoc/master 503a2f0 Sebastien Bourdeauducq: mor1kx: sync
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GitHub105 >
ARTIQ/master b207a3c Sebastien Bourdeauducq: rtio: remove ISE bug workaround
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_florent_ >
stekern: here is a small patch for the store buffer that seems to give interesting result (at least on misoc-de0nano)
08:30
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_florent_ >
I was not able to test it by it should have the same behaviour
08:30
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_florent_ >
and the report for the last commits on misoc-de0nano
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sb0 >
uf6667, I'm curious what about you are using migen for :)
08:35
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uf6667 >
lol why? :)
08:35
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uf6667 >
I'm trying to catch up with openvizsla
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stekern >
ah, I see now
09:06
<
stekern >
you didn't happen to do a build on 2440fab too?
09:06
<
stekern >
err, 0454b5b I mean
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<
_florent_ >
started :)
09:09
<
stekern >
since when I built for the ppro target, I got an increase by ~400 LUTs by that(!)
09:09
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stekern >
when by all logic, it should use less resources
09:10
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_florent_ >
yes I've tried that on mixxeo, and have the same result
09:11
<
_florent_ >
it seems ISE is replicating lots of things...
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<
stekern >
so it's actually mariginally bigger there too..
09:15
<
_florent_ >
yes strange...
09:19
<
_florent_ >
let me check what it gives me if I revert the 2440 and use my last patch...
09:19
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stekern >
maybe the tools were already able to re-use the registered outputs in the RAM
09:20
<
stekern >
but on a source level, explicitly using the read_enable logic is a lot cleaner, so I'm inclined to keep it as is now
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09:25
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_florent_ >
yes I agree
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_florent_ >
hmm interesting:
09:29
<
_florent_ >
if I use upstream version + my patch
09:29
<
_florent_ >
I have better result than
09:29
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_florent_ >
upstream version - 2240 + my patch
09:29
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_florent_ >
so 2240 + my patch seems to really improve things finally
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09:39
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stekern >
the difference on ppro is -2 LUT ;)
09:40
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_florent_ >
lol, with my patch?
09:43
<
stekern >
I'll apply it anyway, since it seems to make a real difference on cyclone iv and the logic is as easy (or even slightly easier) to follow
09:43
<
stekern >
the only thing where it might harm is if there's a cost to reset to !0
09:45
<
sb0 >
on s6, if the reset value is different than the bitstream initialization value, the reset input cannot be used and it needs to go to LUT logic
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<
sb0 >
I'm not sure what happens when you don't specify a bitstream init value - if it sets it to the reset value or not
09:46
<
sb0 >
had you used migen, you could easily fix that problem by automatically inserting bitstream init values that match the reset values :-)
09:49
<
stekern >
I would assume it'd be set to the reset value
09:50
<
stekern >
iirc cyclone devices use a different approach, where they have a reset to 1 and a reset to 0 input
09:51
<
stekern >
...but don't take quote me on that, I might very well be remembering wrong ;)
09:52
<
stekern >
s/take quote/quote
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uf6667 >
sb0: are you looking for someone to make cores?
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uf6667 >
I specialize in timing constraint optimization... if that's of any use to you :)
10:33
<
sb0 >
ok... what have you worked on before?
10:33
<
sb0 >
timing constraint optimization is rather general :-)
10:34
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uf6667 >
hmmm plenty of stuff but the most recent was progskeet
10:34
<
uf6667 >
made the usb core from scratch
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sb0 >
is the actel fpga connected directly to the usb port?
10:36
<
sb0 >
it's 12Mbps right?
10:36
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uf6667 >
ok bad example :D
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sb0 >
so you did the serial interface engine, etc.
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sb0 >
did you like it? :-)
10:37
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uf6667 >
pretty much, but it was kinda hard without analysis hardware xD
10:37
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sb0 >
cool. so you like disgusting protocol. that's a useful perversion to have. everytime I touch USB, I want to behead its designers.
10:37
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uf6667 >
had to embed a serial port into pretty much everything
10:38
<
uf6667 >
oh and everything related to stuff depending on counters
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<
sb0 >
do you have the code of that USB core somewhere btw?
10:40
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uf6667 >
also made a 2chan oscilloscope using a s3e board and vga monitor, including triggering and all, without any software
10:40
<
sb0 >
the download link on your website says sql error
10:40
<
uf6667 >
yeah sure let me check
10:40
<
uf6667 >
oh lol, its not opensource :)
10:40
<
uf6667 >
and its not my site anymore
10:40
<
uf6667 >
I got ripped off hard
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<
uf6667 >
ah shit, I forgot my external hdd in england :/
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sb0 >
where do you live, btw?
10:43
<
uf6667 >
luxembourg and studying in uk, you?
10:43
<
sb0 >
(external hdd) that's one reason to make stuff opensource ;)
10:43
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uf6667 >
ah cool, useful :D
10:44
<
sb0 >
I haven't had time to check out Shenzhen yet...
10:44
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uf6667 >
doesn't matter! If I lived there, I'd be making stuff 24/7 and throw everything into production
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uf6667 >
plus, studying chemistry, plenty of chemicals you can get there you can't get here :)
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sb0 >
what kind of thing do you want to put into production?
10:46
<
sb0 >
haha, my best country so far to order chemicals has been France
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<
sb0 >
and Germany the worst
10:46
<
uf6667 >
really? :o
10:46
<
uf6667 >
I need some LiAlH4 :D
10:47
<
uf6667 >
bugs like spybugs
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<
uf6667 >
there's plenty of private detectives here
10:47
<
uf6667 >
they go crazy for it
10:47
<
uf6667 >
"need" meaning "I'd really really like some"
10:48
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sb0 >
hmm what do you want to do with LiAlH4?
10:49
<
sb0 >
ah, well, that was funny when I was in high school...
10:49
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uf6667 >
yeah it's very profitable now :)
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sb0 >
not all profitable things are good...
10:52
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uf6667 >
true, but this is :D
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11:18
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rjo >
sb0: fud resolution. you mean the cast from artiq language set_frequency() to fud rtio time? yes. treat it like the rounding of rtio timings.
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_florent_ >
stekern, just for info:
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_florent_ >
this modification allows to store data in registers when DEPTH_WIDTH=1 on store buffer
14:00
<
_florent_ >
this kind of remove the store buffer and seems to save 200 regs on mixxeo BaseSoC.
14:00
<
_florent_ >
this one changes some logic in logic operations and seems to save 100 luts on mixxeo BaseSoC.
14:00
<
_florent_ >
It's not tested nor simulated, but I'll try to do that soon, but in case you want to have a look...
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GitHub119 >
NetBSD/master b7d17d1 Yann Sionneau: uart: add TTY layer support
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<
GitHub119 >
NetBSD/master 1e167fe Yann Sionneau: clock driver: Fix softc handling. Hello world from user space works :)
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<
GitHub119 >
NetBSD/master 712cccd Yann Sionneau: init: update /sbin/init which is now able to print to uart console
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