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<gediz0x539>
megi: thanks, I'll try :)
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<mripard>
megi: wow, that's weird
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<Ashleee>
oh for fox sake. Another tanix box but it has different RAM (DDR3 instead of LPDDR3 it seems) and fails on "DRAM:Error while initializing DRAM PHY!"
<Ashleee>
all are DDR3-1600, but one is normal power (that doesn't work, 1.5V?) and the one that works is low vdd (1.35V)
<chewitt>
all box devices are a pain in the arse to support
<chewitt>
there is no guarantee that your "tanix" box actually came from tanix
<chewitt>
anything "popular" or getting a good review is cloned quickly
<chewitt>
sometimes anything more than having the right SoC inside is a bonus :)
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<Ashleee>
:D
<Ashleee>
bought 3 at once and each is different :)
<Ashleee>
love this
<KotCzarny>
good for a developer
<Ashleee>
i'll trade :)
<PPA>
I thought that was true only for the unbranded ones (in this case, the ones with “TX6” on them rather than the Tanix logo)
<Ashleee>
hmm can I just replace ATF with boot0 extracted from the eMMC? :D
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<KotCzarny>
no
<KotCzarny>
unless you can run legacy kernel
<Ashleee>
dangit
<Ashleee>
and all the sunxi tools do not support H6 :V
<Ashleee>
to extract meminfo
<Ashleee>
oh aliexpress... "Feel the breeze in the car!" email ad... too bad I already drive a cabrio >:D
<KotCzarny>
get second one, just because
<PPA>
unbranded red cabrio “F1 Turbo” with a randomised configuration of engine, gears, tank capacity, etc.
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<gediz0x539>
good for a driver :P
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<KotCzarny>
but comes with all proprietary software and connectors which is almost impossible to obtain even for basic tasks
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<Ashleee>
you're laughing, but there's those cheap cars on aliexpress, free shipping "to the nearest port" :)
<KotCzarny>
kid's quality toys
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<Ashleee>
I\ve just noticed that the two tanixes have got the same memory chips, yet one of them works and the other one fails with the DRAM PHY init error... wut :)
<Ashleee>
PGSR0 = 20003d...
<Ashleee>
another chip has that bit as PGSR0_CAWRN_SHIFT
<Ashleee>
WRN? :D
<Ashleee>
so I can ignore? :D :D
<Ashleee>
trying to find a reasonable armv8 disassembler but IDA free has only x86/x64 :(
<gediz0x539>
he told me that he had some DRAM errors
<Ashleee>
I have 4 in total, 1 from one seller and 3 from another seller
<Ashleee>
1 from one seller is 4G/32G with rev2.4 board and the 3 are 4G/64G rev2.3 boards.. from which 2 got debianized with slight troubles and the third one is resiting
<Ashleee>
gotta love this :D
<Ashleee>
resisting **
<gediz0x539>
so they are not produced as consistent as we hope them to be :D
<Ashleee>
nope
<Ashleee>
and I have no idea what's different, the chips are the same
<Ashleee>
and I have no idea what that bit is, the CAWRN is from another board (as there's no info about the DRAM PHY for H6)
<KotCzarny>
well, same markings, not same quality
<KotCzarny>
even disregarding board revisions and quality
<Ashleee>
but I tried warning -> skip it.. no luck :D
<mru>
ARM Holdings Ltd is a UK company fully owned by Softbank
<KotCzarny>
so yeah, blame the greedy americans for no docs on dram controller
<KotCzarny>
:)
<KotCzarny>
(not that there are no greedy folks anywhere else, but.)
<Ashleee>
oh dear :D
<Ashleee>
and yeah I know all about ARM history being Acorn etc :)
<Ashleee>
been to the museum in Cambridge :P
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<Ashleee>
I have just noticed
<Ashleee>
there's 8 DRAM modules from which 7 are -B and one is -Q
<Ashleee>
on the other working units all are -B
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<Ashleee>
:D
<Ashleee>
shoul be just revision
<Ashleee>
but their revisions end at G
<Ashleee>
err end at H
<Ashleee>
b-die vs q-die
<gediz0x539>
Ashleee: yep, he could not fix the DRAM problems yet
<Ashleee>
the only difference I see in B-die and Q-die is that B-die supports 1.35V/1.5V operation whereas Q-die supports only 1.5V
<Ashleee>
so depends on how the DRAM PHY is set... brr :)
<Ashleee>
if it wasn't BGA I'd throw a scope at it
<gediz0x539>
are die references listed in the datasheet?
<Ashleee>
which die references?
<gediz0x539>
s/references/differences/
<Ashleee>
oh
<mru>
no mr bond, I expect you to die
<Ashleee>
:P
<Ashleee>
I'd prefer if Q from startrek died.
<Ashleee>
no, but the only noticable difference is the voltage
<Ashleee>
timings etc are the same
<mru>
bond might not die, but the die is bonded (hopefully)
<gediz0x539>
hahah
<Ashleee>
still trying to figure out if it is set somewhere as external Vdd* from the axp* or whether it is IO voltage set as a register in the DRAM controller itself
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<Ashleee>
tried this, they have extra bits for DDR3 vs DDR3L in here, but no luck :(
<jernej>
more or less everything here works also for H6, but there are one or two registers, which are not documented and few offsets might be different
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<jernej>
Ashleee: I investigated this problem a bit but I couldn't find the reason for this
<jernej>
status always indicates that it's write leveling error but I'm not sure how to fix this
<jernej>
maybe some parameter issues
<jernej>
btw, I have properly working TX6 box (all chips are -Q) and someone else helped me with testing, so it was slow...
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<Ashleee>
jernej, I have a box with B-die working fine, a box with Q-die working fine but a box with a mixture is wrong
<Ashleee>
if I understand it correctly it does auto-detection on some params but I think it does it on B-die but fails on Q-die?
<Ashleee>
or vice-versa
<mru>
at least it's not that obnoxious pew-die
<jernej>
there is not much autodetection going on
<jernej>
basically just size
<Ashleee>
I thought that all the -leveling stuff is basically autodetection :)
<Ashleee>
but then again I just got back from the pub so I might be overestimating its capabilities :D
<jernej>
well, there is autocalibration for some stuff
<Ashleee>
yeah
<Ashleee>
that's the culprit imho
<Ashleee>
it calibrates for B-die but fails on Q-die (or vice versa)
<jernej>
but delays are fixed
<Ashleee>
I'd expect some termination resistance being calibrated etc
<Ashleee>
.. nvm I really shold look before asking :)
<Ashleee>
did you dump that from a running system or u-boot?
<jernej>
no, that's my work with intent to fix DDR3 issues on some Tanix TX6 box
<jernej>
but according to the tester, it changed something but not really solved
<Ashleee>
:)
<Ashleee>
I can try tomorrow early morning
<jernej>
you are free to try :)
<Ashleee>
^^ if I get up
<jernej>
anyway, as I don't have problematic version of the box, it was done completely through reverse engineering
<Ashleee>
I'll happily exchange :D
<jernej>
:)
<Ashleee>
I tried disassembling the boot0 from another 64GB version (hoping they have the same u-boot) but I Ghidra interface is too different to IDA for the first attempt :)
<jernej>
the box I have was already a donation to make DDR3 work on mainline U-Boot
<Ashleee>
s/I//
<jernej>
so, logically, DDR3 works only on that TX6 variant that I have :D
<Ashleee>
:D
<Ashleee>
I can confirm that it works on pure B-die, on pure Q-die but not on a mix :)
<jernej>
it would be very useful to compare DRAM registers from Android and mainline U-Boot
<jernej>
I bet there is something off, but probably not much
<Ashleee>
if you tell me how to.. :D
<Ashleee>
sadly the delay in u-boot i 0 seconds
<Ashleee>
is*
<jernej>
well, you can't get into U-Boot because DRAM can't be initialized :)
<Ashleee>
I mean the stock u-boot :)
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<jernej>
ah, just boot into Android and use devmem applet
<jernej>
usually included busybox supports it
<Ashleee>
ooh
<Ashleee>
can try tomorrow morning
<Ashleee>
can it do ranges? :)
<jernej>
but there you can only read one reg at a time
<jernej>
so some bash scripting is in order
<Ashleee>
:P
<Ashleee>
suddenly I feel like I am at work again with all the bash scripting! :D
<jernej>
IIRC devmem is probably not exposed as command, so you have to call it "busybox devmem"
<Ashleee>
I'll grab an extra long stick tomorrow to poke it with :)
<Ashleee>
I've never messed with android tbh :D
<jernej>
well, I only do when I need to see how allwinner kernel configures some peripheral and it's unclear from source
* Ashleee
looks at boot0 "what source"? :)
<jernej>
I suggest that you locate libdram from H6 U-Boot sources and decompile that
<jernej>
it has even some debug symbols in it
<jernej>
but unfortunately, all public ones are pretty old
<jernej>
I mean, Android uses newer version of DRAM configuration lib
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<mirko>
when off the AV and/or TV connected to my h6 (via HDMI) there's no way i get audio/video out of the hdmi port again other than rebooting. nothing in the logs. applications behave like everything is fine. tv/av just say "no signal" when turning back on. anybody an idea how/why this is happening?
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<buZz>
mirko: possibly there needs to be a switch to hdmi happening
<buZz>
not sure if there's a tool for h6/your board yet to do so
<buZz>
did you try the vendor provided linux images, to see if that can hotswap to hdmi output?
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<mirko>
buZz: didn't (yet)
<buZz>
maybe thats a route to verify how your board wants that to happen