Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<MoeIcenowy> IgorPec: is there anyone who tested my H6 DRAM initialization code on any Allwinner LPDDR3 chips? (Orange Pi One Plus/Lite 2)
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<wens> MoeIcenowy: what did you say the PCIe window size for H6 was? 64k?
<MoeIcenowy> wens: yes
<MoeIcenowy> 0x10000
<MoeIcenowy> and it is mapped from a virtual memory space
<wens> should still be useful for wifi or sata?
<MoeIcenowy> no
<MoeIcenowy> the problem is more complex
<wens> oh, the page/bank switching thingy
<MoeIcenowy> it's not the PCIe memory space is only 64k
<MoeIcenowy> it's the virtual memory space containing both IO and non-prefetchable memory space is banked
<MoeIcenowy> theortically it might be still possible to use 64k PCIe prefetchable memory, use an unstable mux similar to the one in pcie-tango.c
<MoeIcenowy> however dwc code shares too many things
<MoeIcenowy> makes this nearly impossible on dwc
<MoeIcenowy> (and even this is implemented, it's not reliable
<wens> oh, yeah, tango controller is broken like ours :/
<MoeIcenowy> wens: no, tango controller is not so broken
<MoeIcenowy> it at least doesn't have a brain-damaged virtual memory space
<MoeIcenowy> :-(
<wens> virtual memory space?
<MoeIcenowy> wens: from the CPU view
<MoeIcenowy> the PCIe space is only 0x20000
<MoeIcenowy> the first 0x10000 is for dwc, the second 0x10000 is a window
<MoeIcenowy> the window is mapped to a page in a virtual memory space
<MoeIcenowy> (selected by a reg in the first 0x10000
<MoeIcenowy> and the PCI IO/MEM space is in the virtual memory space
<MoeIcenowy> (IO space is 0x10000 size
<MoeIcenowy> (MEM space is bigger
<wens> so you can only map 0x10000
<MoeIcenowy> yes
<wens> which is still ok-ish for wifi and small sata controllers
<MoeIcenowy> and if you map a page in MEM space you cannot map IO space
<wens> I guess I need to read up on PCI
<MoeIcenowy> (The description above is only applied to the broken implementation of DWC PCIe on H6
<MoeIcenowy> (on a normal implementation, a virtual memory space shouldn't exist, and the IO/MEM space should directly lie in the CPU memory space
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<wens> hmm, I thought IO space was x86 only stuff
<wens> i.e. does not work for non-x86
<wens> looking at my x86 server, seems only x86-centric (intel stuff) and devices that support booting off of have I/O space
<wens> everything else is MMIO
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<wens> MoeIcenowy: so my guess is that this pcie controller is limited to serving only one device, no IO space support
<wens> MoeIcenowy: do you have any preliminary work for pcie?
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<MoeIcenowy> wens: IO space is an emulation of the in/out instruction of x86
<MoeIcenowy> translate them to a MMIO space
<MoeIcenowy> wens: I tried to restrict the memory space to 64K
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<MoeIcenowy> but the RC itself has 64K option ROM
<MoeIcenowy> and fills the space
<wens> RC? raid card?
<wens> disable option rom? :)
<MoeIcenowy> Root Complex
<MoeIcenowy> the root node of PCIe
<MoeIcenowy> like the HCI of USB
<MoeIcenowy> something to mention: SATA cards have some traditional IO
<MoeIcenowy> maybe now the only way is to write an EL2 wrapper
<wens> oh
<MoeIcenowy> (but I have no AArch64 bare-metal (and even EL2) development experience
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<MoeIcenowy> and my WLAN cards all claim MEM space > 64K
<wens> interesting... my iwlwifi only claims 8k
<wens> MoeIcenowy: we can choose to not support IO space
<MoeIcenowy> wens: if the capability of a card is not fully satisfied
<MoeIcenowy> Linux will refuse to probe it
<wens> well, then it remains unsupported until we figure a solution for the controller issues
<MoeIcenowy> EL2 wrapper
<MoeIcenowy> the crazy RaspberryPiPkg has done many crazy things with EL2, but with help from EDK2
<wens> MoeIcenowy: seems like root complex claiming the whole space is not uncommon? it is a bridge, so it is exposing the window it can provide to devices connected to it
<wens> which is 64k
<MoeIcenowy> but it has extra cost
<wens> I say we might not need the wrapper
<MoeIcenowy> no
<MoeIcenowy> we need
<wens> we might just have a misunderstanding about how pci works
<MoeIcenowy> you misunderstood.
<MoeIcenowy> See this sentence 'Region 0: Memory at f2400000 (64-bit, non-prefetchable) [size=512K]'
<MoeIcenowy> (from lspci -vv on my PC
<MoeIcenowy> (it's an Atheros AR9462
<MoeIcenowy> the memory section from 0xf2400000, size 512KiB, is allocated to the card
<MoeIcenowy> and the driver can directly access 0xf2400000 to access the registers on the card
<wens> yeah, and the bridge on the H6 doesn't support such a large window, so you can't use such a card with it
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<MoeIcenowy> no it support
<MoeIcenowy> but it doesn't fully map it to CPU
<wens> but you said root complex claims 64k?
<MoeIcenowy> it's not "Memory"
<MoeIcenowy> it's "Expansion ROM"
<wens> can we skip the AR9462 case?
<wens> clearly it's not going to be usable without a lot of work
<wens> do you have any patches that simply get the pcie controller to probe
<MoeIcenowy> wens: I have
<MoeIcenowy> (although probe means nothing
<MoeIcenowy> oh not only r/w IO space needs muxing
<wens> can you provide them somewhere? I simply want to see what the root complex looks like
<MoeIcenowy> reads cards' config space also needs muxing
<wens> yeah, but you only read card config space at probe time, no?
<wens> or not
<wens> anyway, one thing at a time
<wens> a) get the controller to probe, b) config space, c) mmio space, d) probe a card
<MoeIcenowy> P.S. probing the controller only reads the DBI space
<MoeIcenowy> which is not paged
<MoeIcenowy> (the first 0x10000
<wens> I know
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<MoeIcenowy> enjoy a months-aged branch
<MoeIcenowy> ;-)
<wens> thanks, I assume the driver is a port of the BSP one?
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<MoeIcenowy> wens: yeah
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<wens> it seems we are not the only platform that has such a small ATU window for PCIe
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<adj_> wens, for example? NXP's i.mx6?
<MoeIcenowy> wens: the MFD ACK of axp805 patchset comes.
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<wens> finally
<wens> adj_: the dwc ecam driver changes lists marvell ARMADA 80x0 as an example
<wens> but the limitation is really only accessing config space
<wens> IO and MEM space are mapped directly to the CPU address space. that's what the ranges property in the pcie controller node describe
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<MoeIcenowy> wens: it's sunxi-specific hack
<wens> MoeIcenowy: what is?
<MoeIcenowy> the IO and MEM space not directly mapped
<KotCzarny> cheap hardware is cheap
<wens> MoeIcenowy: they _are_ directly mapped
<KotCzarny> save few lines, fix in software later
<MoeIcenowy> wens: please try on a real chip
<wens> intel 6205 iwlwifi
<MoeIcenowy> KotCzarny: you may mean lanes or wires?
<KotCzarny> wires
<KotCzarny> in chip
<MoeIcenowy> wens: ok
<MoeIcenowy> try to bring it up!
<MoeIcenowy> and you will get weird
<wens> yeah. I need to compile it as a module :(
<MoeIcenowy> and if you do inspection with devmem2 command
<MoeIcenowy> you will know what I'm saying
<MoeIcenowy> the 0x05e00000 and 0x05500000 spaces are not in CPU memory space
<MoeIcenowy> but in virtual memory space of PCIe
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<MoeIcenowy> the design is so weird that only people that discover it by themselves can understand it
<KotCzarny> MoeIcenowy: can it be hardwired to split half of the mapping into io and rest for mem banking?
<MoeIcenowy> KotCzarny: no
<KotCzarny> so you can pretend io would be always mapped
<wens> ah, I see
<MoeIcenowy> config space / io space are both a single 64K page
<MoeIcenowy> wens: if you want to roar, do it ;-)
<wens> so that's what the sunxi_pcie_bus_cutpage_* functions in the BSP are for
<MoeIcenowy> yes
<MoeIcenowy> and please note that "cutpage" is a real Chinglish
<MoeIcenowy> I hope you can understand it ;-)
<KotCzarny> :)
<wens> I actually don't :(
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<MoeIcenowy> wens: ah "cut" means “切" here, which is short for "切换", "switching"
<MoeIcenowy> *facepalm*
<wens> *sigh*
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<KotCzarny> MoeIcenowy: hmm, can you map them overlapping?
<MoeIcenowy> KotCzarny: no
<KotCzarny> or only single mapping can be active at a time
<MoeIcenowy> only a single page can be mapped to the window at the same time
<KotCzarny> sucks
<MoeIcenowy> but if a wrapper is to be writing
<KotCzarny> any workaround will kill the performance badly
<MoeIcenowy> it will be quite simple
<KotCzarny> MoeIcenowy: maybe arisc could be used as a background data copier for mem mapping and just leave io mapped?
<MoeIcenowy> KotCzarny: there
<MoeIcenowy> 's no room for data copying
<adj_> MoeIcenowy, so every driver must be patched to use that switching hack?
<wens> wonder where the cutpage functions get called
<MoeIcenowy> adj_: this is what BSP does
<MoeIcenowy> wens: if you have a newer BSP
<MoeIcenowy> it was called in "bcmdhdpci" driver
<wens> oh great
<MoeIcenowy> wens: it's quite simple
<MoeIcenowy> writel(0x5500, 0x05401020) will map the virtual space <0x55000000 0x10000> (high 16 bit according to 0x05401020) to physical space <0x05410000 0x10000> (a fixed area)
<MoeIcenowy> P.S. the one who ported UEFI EDK2 to Lumia phones (imbushuo) recently grabbed a Orange Pi One Plus from one of his friend (also mine)
<MoeIcenowy> maybe he will do an EDK2 port for H6 soon? ;-)
<wens> this is so idiotic. why would you have AXI masters, only not to use them properly
<wens> MoeIcenowy: haven't looked, but I'm guessing bcmdhdpci doesn't use standard ioremap stuff?
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<wens> can we ask them what registers 0x1030 and 0x1034 are for?
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<MoeIcenowy> wens: they have no response
<MoeIcenowy> from Chinease New Year to now
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<wens> :(
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<micken> Hi
<micken> What is "offset" in genfb (NetBSD) I guess it is same in linux
<micken> Uboot puts fb at be000000
<micken> seems ok
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<jakllsch> micken: i think it's way to hoist the beginning of the framebuffer away from the beginning of video memory... but i should probably actually check
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<jakllsch> or maybe it's just the framebuffer address
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<micken> ok
<micken> I can write to be000000 from RISC OS
<micken> I have other problems after that :)
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<jakllsch> beware virtual/physical translation
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<micken> jakllsch: I am mapping it (MMU) and can clear the screen , put up a bitmap etc..
<micken> jakllsch: the problems are later on,,, feels like RO writes outside teh screen
<micken> :D
<hlauer> wens: thanks for the info to 4.18 banana mmc pm issues. Is a patch somewhere/what to watch for ?
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<wens> hlauer: "mmc: sunxi: Disable irq during pm_suspend"
<wens> on LAKML, discussion ongoing
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