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<
martinayotte >
@MoeIcenowy, maybe I missed some history, did your R40-CCU got merge into 4.13 ?
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<
MoeIcenowy >
martinayotte: 4.14
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<
MoeIcenowy >
but device trees fail to enter 4.14
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<
KotCzarny >
hrm, opipc has spi1_clk and cs routed, but no miso/mosi?
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<
plaes >
ooh.. nice drm patches..
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http://www.kvirc.net/ ]
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<
jernej >
MoeIcenowy: What is your performance with Mali X11 driver on H3 mainline kernel?
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<
jernej >
Do you know why we could get only ~3 fps with it?
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<
jernej >
Maybe something similar to your issue with H5 and Mali450?
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<
jernej >
I guess we should rename MALI_GPU_RESOURCES_MALI400_MP2_PMU() to MALI_GPU_RESOURCES_MALI400_MP2()?
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<
MoeIcenowy >
oh I got 30fps
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<
MoeIcenowy >
but you can try this -- this problem also exists on 400
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<
jernej >
zador tried it, but no luck
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<
jernej >
he achieved more fps with mesa SW rendering
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<
jernej >
do you know what exactly is the issue with PMU? How did you find it?
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<
MoeIcenowy >
the macro doesn't wire the IRQ of PMU
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<
MoeIcenowy >
jernej: what's the GPU clock in your problem?
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<
jernej >
MoeIcenowy: zador tried to integrate your patches
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<
jernej >
so it is 384 MHz
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<
MoeIcenowy >
in fact in my work it's 297MHz ;-)
12:16
<
MoeIcenowy >
because of some bugs in CCU ;-)
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<
MoeIcenowy >
pll-gpu failed to be set, and the default val is 297
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<
jernej >
in the mean time, you don't have fix for crashes in job_create() or something like that
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<
MoeIcenowy >
oh yes...
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<
MoeIcenowy >
P.S. there is proper licensed mali-400 r6p0 arm64 blob
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<
jernej >
Yeah, I hope for some GBM drivers too. If somebody could get them, there would be high probability for official LibreELEC port.
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<
jernej >
both, armhf and arm64
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<
MoeIcenowy >
rk seems to have gbm r7o0
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jernej >
Yes they have, but their license allows to use it only with Rockchip SoCs
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<
jernej >
so not redistributable
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<
MoeIcenowy >
even for r6p0+ ?
12:27
<
jernej >
Check root of that repo
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<
jernej >
r6p0 only means there is possibility for new license, but not guaranteed
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<
MoeIcenowy >
jernej: yes
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<
MoeIcenowy >
but it's really 297MHz
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<
MoeIcenowy >
and I'm too lazy to fix it
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<
jernej >
Are you sure this has nothing to do with clock fixes I sent while ago to mainline kernel?
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<
jernej >
about fractional mode?
12:30
<
MoeIcenowy >
I think so
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<
MoeIcenowy >
as 297 is default frac val
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<
jernej >
MoeIcenowy: I just checked mali kernel driver from H3 BSP and it too doesn't use PMU interrupt define
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<
jernej >
However, MALI_GPU_RESOURCES_MALI400_MP2_PMU() is used
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<
antony1 >
testing new dwmac-sun8i/stmmac patches on nanopi neo plus2 and noticed receiving is faster. sending peak at ~750Mbps while receiving goes up to ~935mbps.
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<
willmore >
antony1, yay!
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