ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion | IRC log http://irclog.whitequark.org/linux-rockchip | Community GH https://github.com/linux-rockchip | Rockchip GH https://github.com/rockchip-linux | ML https://groups.google.com/group/linux-rockchip
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<hanetzer> sphalerite: heyo. close to having an 'automatic' way to build petitboot-enabled coreboot images :)
<sphalerite> ooooooooh
<hanetzer> sphalerite: basically, I'm forking https://github.com/open-power/op-build (which is a buildroot overlay, basically) and adding gru support
<hanetzer> in theory it should be as simple as clone, cd, source op-build-env, op-build gru_defconfig; op-build, and the stick output/images/uImage into a coreboot dir and build it with a FIT payload :)
<sphalerite> it's almost never that simple on nixos :p
<hanetzer> hehe. well, I can't do anything about build woes, but it should be easy enough.
<sphalerite> things would be so much better if everyone stopped hardcoding /usr :p
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<hanetzer> heh. what makes nixos hate that? I'm not familiar with it.
<sphalerite> there is no /usr in the conventional sense
<sphalerite> the only thing in /usr is bin/env
<sphalerite> all the packages live in /nix/store, and the currently "installed" versions are symlinked in various relevant places
<hanetzer> ah, fun.
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<hanetzer> sphalerite: I just ran into a minecraft ore with your nick :P
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<inode> can anyone with a copy of a RK322x TRM share some GRF bitfield descriptions if i provide the register name and bit offsets?
<inode> i want to submit a patch, and i am relying on bitfields declared somewhere in kernel-develop-4.4, but i'd like to know more about what the bits the individual bits (or bitfields) represent first
<ndufresne> inode, rockchip.fr publish a lot of TRM
<ndufresne> because the HW is so similar, you can often cross them
<ndufresne> have you consider trying to look at the PX3 TRM ?
<inode> i haven't
<ndufresne> it's 3288 like though
<inode> ah ok
<inode> thanks
<inode> i got the "datasheet" for the RK3229 from there, but it is more of a product reference that says look at these cool blackboxes
<ndufresne> datasheet aren't very useful for that I guess
<ndufresne> inode, btw, there is a lot of GRF_ registers ;-P
<inode> i'm only interested in two of them :D
<inode> and a few bits of each of those
<ndufresne> but I think the PX3 TRM will be useful
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<mmind00> inode: I can probably help you with that
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<inode> GRF_SOC_CON2: BIT(14) = HDMI SDA IN MASK, BIT(13) = HDMI SCL IN MASK
<inode> GRF_SOC_CON6: BIT(6) = HDMI CEC VSEL, BIT(5) = HDMI SDA VSEL, BIT(4) = HDMI SCL VSEL
<inode> where VSEL is (0 = 3.3V, 1: 5.0V) voltage selection
<inode> are these assumed descriptions more or less correct?
<mmind00> inode: for the hdmi_sda/scl_in_masks the "explanation" is just the "hdmi_scl_in_mask" no further text ... bits itself are correct
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<inode> i've made these assumptions from looking at kernel-develop-4.4's and mainline's driver/gpu/drm/rockchip/dw_hdmi-rockchip.c, the 3328 TRM as a loose reference for the descriptions of the bits which reside at different offsets obviously
<mmind00> inode: for soc_con6 ... bit4 is "hdmi_ddcscl & i2c3_scl", bit5 is "hdmi_ddcsda & i2c3_sda", bit6 is hdmi_hpd ... and the value is 1 for 3.3V and 0 for 5V
<mmind00> inode: sadly again no further description on how it is supposed to be used
<inode> aah
<inode> hpd
<inode> is cec at bit 3 of GRF_SOC_CON6?
<mmind00> inode: can't really say ... bits[0:3] are only described as "IO Voltage select control" ... with per-bit val=0 being 3.3 or 2.5V and val=1 being 1.8V
<inode> alright
<inode> thanks a lot for checking that out
<mmind00> inode: so bit3 is some voltage control but the TRM doesn't specify
<inode> that's interesting that the voltage selection is inverted for "hdmi {sda,scl} port 3.3V/5V io select" between 3228 and 3328 though, seems on 3328 0 is 3.3V and 1 is 5V
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