<theRat>
I think I found a problem in all the .fex files for the A10. spi0_para is configured to use feature 3 while the datasheet says it should be 2.
<GeorgeIoak__>
anyone have an A10 based tablet with reisitive touch screen and calibration program? the calibration program isn't working with my 15.^' screen and i wanted to try a different code to see the results
<theRat>
I might have to look at changing that. The hardware supports full duplex, so its should just be a driver issue
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<vinifm>
LINE 813: if(t->tx_buf && t->rx_buf) return -EINVAL;
<vinifm>
I'm trying to add full-duplex spi_sunxi driver
<theRat>
it shouldnt be hard since to do a read you already are writing, you just need to write the correct data.
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<extrados1>
I'd like to move my debian install from an external sd card to the internal nand. However, when I use nand-part, it throws an error, "all partition tables are bad". fdisk, on the other hand, seems to read /dev/nand fine. Any advice on how to proceed?
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<mdp>
theRat: I tried to poibt that our earlier in a more subtle way :) the hw does it. just the driver is broken
<mdp>
s/poibt/point
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<theRat>
mdp: I didn't see that :( Only new here. I am now looking at how the driver could be unbroken.
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<mdp>
theRat, there's a bunch of drivers in the kernel that have similar simple spi ip like A1x. use them as a model. several set up both pio and dma driven transfers when a request arrives with both tx and rx buf valid
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<mdp>
theRat: davinci_spi.c is an easy to follow example
<mdp>
er, spi-davinci.c
<theRat>
mdp: ok, will have a look. the sunxi one doesn't look too hard to fix either
<mdp>
shouldn't be
<mdp>
ok, bbt
<mdp>
I have interest in this being fixed too..but in the upstream driver effort
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<krackern>
Hello all :)
<krackern>
how may one compile u-boot for a particular device? I have my script.bin with dram parameters all filled..
<torindel>
krackern: uboot is more or less universal assuming you're happy with env placement, and you can boot without it also
<torindel>
(so you could use your current working uboot from android for example)
<torindel>
if you want to build it the sources for sunxi fork are on git
<krackern>
torindel: Yes I pulled the sources... but the wiki was a bit hazy
<krackern>
make 'boardtype'
<torindel>
krackern: ask your self question do you need uboot, boot.axf can load kernel directly (instead of loading uboot)
<krackern>
but I think I have a different boardtype
<torindel>
and have menu ability too
<krackern>
oh is it?
<torindel>
krackern: look at ini files on nanda partition
<torindel>
you can even setup graphical menu which operates with basic hardware buttons
<krackern>
nice idea... Can you put up a sample of changed file? Any documentation for this?
<torindel>
theres a lot of nanda partition dumps on git, you could look at that, plus theres actual crane_sdk_docs which say you egzactly how to configure those ini's to make it work
<RaYmAn>
torindel: have you actually gotten this supposed graphical menu to work?
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<torindel>
RaYmAn: havent tryied as i dont dual boot
<RaYmAn>
right.
<RaYmAn>
I haven't heard of anyone actually getting that working so far.
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<torindel>
RaYmAn: we got docs how to do it, plus most probably you would see it working state on some window mobile image xd
<RaYmAn>
docs and real world rarely coincide in the world of allwinner ;)
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<torindel>
krackern: info on boot.axf is in "how to config, pack, download firmware v1.0.doc" on crane_sdk_docs
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<krackern>
:)
<krackern>
Hey that helps ...Will check it out.. Thanks torindel ;P)
<krackern>
erm... its is chinese!
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<torindel>
krackern: google translate to the rescue! plus you'll get most of things from that samples there without reading chinese xD
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<mnemoc>
hansg: is your reply to the dpms off patch an ack?
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<hansg>
mnemoc, no not really. I've a new version of all my + hamrach + Floris's patches combined here:
<hansg>
I was about to send the set to the list :)
<hansg>
That set is the same as hamrach's latest set with the dpms patch replaced by Floris' version (with the deadlock fixed) + some fixes if my own
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<hansg>
mnemoc, send, not going afk for lunch now
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<mnemoc>
hansg: cool. thanks!
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<hansg_afk>
s/not/note/
<hansg_afk>
your welcome
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<slapin>
hi, all!
<slapin>
how hard it is to route DDR3 memory for A13 CPU?
<mnemoc>
slapin: tsvetan @ #olimex can answer that
<L84Supper>
is that a question like " is that expensive?"
<L84Supper>
or "is that heavy?"
<L84Supper>
if you're asking I'd say it going to be difficult for you
<mnemoc>
as a not-ee guy i've always understood DDR3 routing as hard
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<L84Supper>
it just like code
<L84Supper>
you can make something work with clean or crap code
<L84Supper>
same with boards
<mnemoc>
the cubieboard's ddr3 runs at 480MHz. I suppose their routing is very lean and sexy
<mnemoc>
most craplets do it at 360
<rm>
yeah it's not like half of the cubieboards don't actually work :)
<rm>
does not seem that way at all!
<L84Supper>
how stable is it over temp? if you rub your socks on a balloon withing 4 ft will the esd kill it?
<rm>
from the mailing list
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<L84Supper>
somebody is working on an FPGA daughter board for the cubie
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<Triffid_Hunter>
slapin: for a start, all the lines need to have the same length so that the signals don't get scrambled on the way from ram to cpu.. usually you do this with 'meanders', little wiggles that lengthen the trace.
<Triffid_Hunter>
slapin: however the meanders introduce inductance, which means that the signal moves through the meander more slowly than through a straight trace of the same length, so you need an accurate model of all the parasitic behaviours of the board itself to do it properly
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<L84Supper>
just use the modeling plugin for Kicad for things like that :)
<slapin>
L84Supper: where I can get this one?
<hramrach>
rm: from the mailing list it seems thre were hundreds of boards delivered and a few of them are broken so not bad
<hramrach>
but there are also users that probably have working board but complain that the pre-installed iamge does not do what they want
<L84Supper>
slapin: it does't exist, that's why you should't bother with using Kicad
<mnemoc>
i thought all troubles were related to the defective dc cable
<hramrach>
some seem to be related to boards not boting and users not able to install a working image
<hramrach>
I had on lockup with the board so far and it sometimes does not boot from nand when I remove the mmc card
<L84Supper>
did they die in shipment or are they just shipping whatever comes off the line without any testing?
<hramrach>
running the board 24/7 for a few weeks by now
<slapin>
that's all cool, but I've not got mine at all :(
<hramrach>
L84Supper: presumably they test them.
<hramrach>
thera are people who had the headphone jack come off and the SD slot needing the card pressed against the PCB to work, and there are those cable issues
<L84Supper>
I wonder if parts are coming loose during shipping
<hramrach>
so I guess the fab quality is not the highest
<hramrach>
might be
<hramrach>
the thing is fab quality is something you will only see from user reports, not so much from testing before shipping
<hramrach>
nor from looking at a test run
<hramrach>
which the factory might do at better quality as has been the case with the DC cable samples :s
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<L84Supper>
QC is always tough in China
<Alex1269>
mnemoc, hi.. Are you here ? :)
<mnemoc>
Alex1269: leaving :< back in 30m
<mnemoc>
Alex1269: btw, I'll apply your patches after backporting plat-sunxi to 3.0
<Alex1269>
wow...
<mnemoc>
or it will be impossible to keep both trees maintained
<Alex1269>
now all my questions gone....
<mnemoc>
:)
<mnemoc>
bbl
<Alex1269>
I wanted to make patch for 3.0/3.4 but plat-sunxi....
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<focus>
I hardly believe any of the stuff I hear about equilength tracks.
<focus>
Meandering as slapin says causes inductance - and also its big radio transmitter at those frequencies
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<focus>
To make lines equilength, best to twist a pair around each other in PCB - that automatically makes them near equilength
<focus>
OK for USB, but things like DRAM a bit tricky because of the parallel buses.
<focus>
For those, my idea for parallel bus is to twist each data wire with a ground wire, and bunch the lot together. That keeps their average lengths the same.
<focus>
More drill holes, but a lot fewer calculations
<mnemoc>
isn't it awfully more complex to manufacture?
<focus>
the total number of wires that need special treatment is not that many
<focus>
all the gpio wires don't care
<mnemoc>
good gpio lines would let you implement pcie ;-)
<focus>
then those particular lines need a lot of attention sadly
<mnemoc>
focus: are you adding the axp on the module too?
<focus>
To twist a wire in PCB across 2 layers requires 2 extra holes per twist. Need to twist my be once if not twice.
<focus>
mnemoc: yes
<mnemoc>
does that allow you to hook a LiPo on the base board?
<focus>
The SoM module will have a two pin connector for power. The idea of powering it up through the SoM edge connector sounds a bit naff - although if you do use enough pins, it should be OK.
<focus>
The mboard will have option for lipo, charger, and interface connectors.
<focus>
The LCD connector is on the SOM board - that rescues 40 connections from being wasted.
<mnemoc>
using a separated charger, won't that allow you to use a simpler pmu like the axp15?
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<focus>
not fussed really - first attempt is AXP209 anyone can make their own derivatives - the cubie and eoma use axp209 which is why I copy theirs
<mnemoc>
i see
<focus>
rm: the pandora has steep price 500+ euros about $700!!
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<hramrach>
focus: the meandering is standard practice seen on many boards
<hramrach>
I can't really say anything about the ee advantages and drawbacks over routing through multiple layers and the relative manufacturing complexity and reliability
<hramrach>
not ee person
<hramrach>
but I would expect more holes = more costs, more potential failure points, holes take up space in all layers, need safety space around, have non-trivial size so possibly adding again to parasitic resistance and capacity
<hramrach>
feel free to enlighten me on how all the boards I see use crappy engeneering ;-)
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<mdp>
I can also confirm that's an industry best practice for routing this stuff. hardly a product of crappy layout.
<mdp>
the same thing happens on rgmii phy trace layout too to get the lengths correct for delays
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<hramrach>
well, maybe timtowtdi
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<hramrach>
extrados1: what device do you have?
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<L84Supper>
a good designer tries to limit the amount of vias in a board, especially high speed signal lines, but some people only learn from their own experience and not from from the experience of others
<L84Supper>
reminds me of something about history and being doomed
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<slapin>
L84Supper: any examples?
<L84Supper>
there is a ton of literature out there and application notes on high speed pcb design, spend a few days reading it, it will give you a chance to layout a working board
<L84Supper>
check Altera, Intel, xilinx and several other manufacturers sites with app notes on PCB layout
<L84Supper>
took him 38 hours using Altium to get it right
<L84Supper>
once you do a few it won't feel like it takes forever
<focus>
hramrach: I know the meandering is standard practice and it probably the best for more compact boards, but my electronics training doesn't agree with it. Better to twist cables - but it costs more - a pair of holes per twist and at least two twists needed to make full 360 degree twist
<focus>
I first try to make my boards with twists and if it falls apart, i make it with meander
<L84Supper>
focus: the problem is that your designing a pcb with it's design rules, if you could 3d print a board then you actually could run twisted pairs, but you don't have to
<L84Supper>
laying out PCI Express is a good example
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<focus>
L84Supper: thanks for that link. Twisting tracks around each other between two layers is easy but costly - a pair of holes per 180 degree twist. The advantage is that the wires are nearly equilength automagically if routing a USB pair for example.
<focus>
Not so easy with busses - need to twist a signal wire with gnd wire. and then collect a whole bunch together to make the whole bunch nearly equilength
<focus>
The advantage is that reflections and unwanted coupling is much lower. That providing the first twist is not too far from chip where signal originates from.
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<focus>
long parallel lengths at high frequencies are badly prone to reflection when other tracks come near or there is sharp bend in the wiring
<focus>
But you can avoid all that with twisting because the twisting forces electric fields and magnetic fields to behave slightly differently and reduce all these side effects
<focus>
At high speeds, electrons get to run more of a ballistic mode and build up 'speed' and anthing that impedes it will cause a reflection. But when the wires are twisted, there is less chance of ballistic like transport and less chance of reflections
<focus>
All theory - need to test it out in practice with GHz ARM :)
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<L84Supper>
vias are high speed corners
<L84Supper>
some high speed buses count on the reflections
<L84Supper>
focus: spend some time reading about microstrip and stripline
<focus>
L84Supper: I am full ee, know all that. My training doesn't agree with 'best practice' of day - I don't know when the disconnect happened - I haven't been designing GHz ARM chips lately :(
<hramrach>
there is evolution even in PCB design
<hramrach>
the question is if your course materials were cutting edge or outdated since they don't agree with established paractice
<hramrach>
you can look for more materials or do your own measurements if you have the equipment or just use something and be happe when it happens to work ;-)
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<focus>
probably right - I intend to check the 'normal' method and the original training - because I know original method worked without all these rules.
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<Welsh>
on the subject of EOMA-68 and EOMA-CF, has anyone looked into where to get cases for the cards?
<focus>
Luke's repository had some datasheets from several makers I believe
<focus>
he probably knows them off by heart - if you ask in the arm-netbook mailing list
<Welsh>
Do you know if they're available in very small quantities?
<Welsh>
And where would the repo be?
<focus>
farnell.com, mouser.com, digikey.com all do this kind of stuff - between them someone should have it
<Maqs>
andoma: anything new regarding showtime on a10? :-)
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<vinifm>
mnemoc: a patch needs to be tested before being submitted?
<Turl>
vinifm: submitting broken patches is not a very good practice :)
<vinifm>
was what I thought :)
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<Turl>
at the very least make sure it compiles
<vinifm>
kkk :)
<mdp>
test by inspection ought to be good enough for anybody
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<ssvb>
pidpawel: try a different triplet, something like armv7a-hardfloat-linux-gnueabi
<pidpawel>
ssvb: i forgot to tell. on #gentoo-embedded already told me this and it worked. however thanks ;)
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<ssvb>
pidpawel: ok, hope everything else works just fine for you
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<andoma>
Maqs: i upgraded to latest sunxi-3.0 kernel and switched my userland to hardfloat
<andoma>
lots of issues came up after that :(
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<mnemoc>
andoma: can you try sunxi-v3.0.52-r2 instead of sunxi-3.0's head?
<andoma>
will do (when i get home). I'm away traveling atm.
<andoma>
the issues i have is basically that the framebuffer disp surface refuses to become transparent so when i add video "below" it the video is not visible
<andoma>
and i get a lot of errors (visible as blocking artifacts, incorrect colors) in video decoding as well
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