<zkms>
kind of want to pull out my scope and try it on real hardware >_>;
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<gruetzkopf>
neat
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<prpplague>
<zkms> kind of want to pull out my scope and try it on real hardware >_>;
<prpplague>
zkms: TMI, you should keep that kind of "stuff" to yourself
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<tnt>
daveshah: on the ice40, is cout based on I1/I2/I3 or on I1/I2/cin
<tnt>
?
<daveshah>
tnt: I1/I2/cin
<daveshah>
I3 can optionally be connected to cin too
<daveshah>
but this is configurable, I3 can be used as logic too if you want
<tnt>
ok. I was hoping the connection to the cout logic was after that configurable mux :p
<daveshah>
no
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<mithro>
Anyone here want to help me figure out how to improve the critical path on this USB core? I don't quite understand how to read the nextpnr critical path output...
<whitequark>
swetland: they also wrote the entire firmware in assembly for an obsolete atmega
<whitequark>
that was nrnd
<whitequark>
when they made it
<tnt>
mithro: but ... it met timing.
<whitequark>
and atmel promptly stopped making it
<swetland>
like not nearly enough that trying to "cut costs" like that would make any sense
<tnt>
mithro: so what's your problem ?
<whitequark>
swetland: the lead designer was a firm believer in russian component base
<whitequark>
except the Angstrom factory is not able to makea 7805 clone that survives more than a month without failing short
<mithro>
tnt: None yet, but I'm about to try and make it work on the up5k and wanted to understand better the process for figuring out how to improve it
<qu1j0t3>
pie__: hehe
<whitequark>
which wouldnt be so bad if they didnt put the AA battery inside the milled metal sonar probe
<whitequark>
so when it died the battery wedged itself shut
<pie__>
uh.
<whitequark>
in the most expensive part of the device
<qu1j0t3>
:/
<qu1j0t3>
ok ok i'm convinced
<qu1j0t3>
this should be in your book
<whitequark>
they also used an audio range amplifier for the sonar probe
<whitequark>
the ultrasound sonar probe
<whitequark>
from sometime in the early 70s iirc
<swetland>
some people exist solely that they may be a cautionary tale for others
<whitequark>
another soviet part
<tnt>
mithro: what device is that timing report for ?
<whitequark>
it only came in DIP and the board was a double sided SMT
<whitequark>
so they hired more students to bend the leads of the DIP
<mithro>
tnt: 8k lp
<whitequark>
and solder it as if it was SMT
<pie__>
doh
<pie__>
i mean besides being horribly wasteful that doesnt seem so bad
<whitequark>
its a fucking cassette player amplifier
<whitequark>
why the fuck are you using it for fucking ultrasound
<pie__>
i was just referring to the soldering job
<whitequark>
its not even a GOOD cassette player amplifier
<whitequark>
you could have literally used a $0.1 TI part
<pie__>
ye.
<whitequark>
also the lead designer doesnt trust pick and place machines
<whitequark>
so he made the whole board 1206 and bigger
<whitequark>
and has students assemble them
<whitequark>
the students divide roughly into two categories
<whitequark>
smart and strong
<catplant>
oh this shit
<whitequark>
depending on what they do with components that dont fit
<pie__>
O_O
<whitequark>
iirc there was filing down of an smps inductor involved too
<pie__>
0_0
<whitequark>
for some reason
<Adluc>
stating that someone "doesnt trust pick and place machines" seems enough to get the image i guess :D
<pie__>
do not look into future with remaining eye
<whitequark>
how do you think this is going to fit into up5k
<mithro>
whitequark: When I change up the SoC config I can get it down to about 3.5k
<tnt>
mithro: well, you look for names you recognize and try to figure out what it corresponds to :p In your case usbsoc_usbsoc_interface_adr[3] / usb_endpointout1_outbuf_asyncfifo1_re / usb_endpointout1_outbuf_rdport_adr[7]
<catplant>
oooh usb
<tnt>
unfortunately the destination name is completely eaten up ...
<mithro>
rebuilding Yosys and nextpnr now
<Adluc>
whitequark: how did it continue?
<swetland>
presumably you fold some of the LUTs. similar to how one puts a 5.25" floppy in a 3" drive
<whitequark>
Adluc: i dunno
<whitequark>
swetland: AAAAAAA
<qu1j0t3>
whitequark: I feel I've seen the software equivalent of that project a few times
<Adluc>
whitequark: is there any logic why that guy was doing such choices?
<Adluc>
if any ofc
<tnt>
mithro: but ... you have about 8 layer of logic. To get any change of running at 48 M in an UP5k you need to get it down to 5 at most.
<swetland>
okay, time to stuff the rest of this board and see if it catches fire or not
<whitequark>
Adluc: i think it was some weird form of nationalism
<whitequark>
combined with
<whitequark>
general uh
<whitequark>
i don t know probably no logic there no
<whitequark>
tnt: mithro: i'll make it even easier
<whitequark>
you will never have an entire usb core running at 48 M in an UP5K
<whitequark>
i could barely get a vga character generator urnning at slightly more than that
<whitequark>
the best chance you have is to make a gearbox
<whitequark>
that will *maybe* work
<daveshah>
What concerns me more is that the previous tinyfpga core passed timing with the vendor tools and still wasn't reliable on the up5k
<tnt>
whitequark: well luke's old core worked at 48M (with icecube)
<daveshah>
I think it worked sometimes on some boards but not others
<tnt>
daveshah: well luke's default code had latches in it ...
<tnt>
when fixed up, it always worked for me.
<tnt>
I'll try to wire up a usb port on an icebreaker and build it.
<daveshah>
Yes, I know Mario got it working on icevision board too with similar fixes
<daveshah>
But there were sometimes reliability issues
<mithro>
daveshah: There are sometimes reliability issues with his old core full stop...
<tnt>
hehe :)
<daveshah>
Yes, my Ex prototypes are useless for this reason
<catplant>
wonder how much'd be freed if using an external phy
<mithro>
That is part of the reason he did the rewrite
<catplant>
like ULPI
<mithro>
I know that the core had a lot more margin before I started playing with it
<mithro>
So it is likely I've just done something stupid
<tnt>
mithro: why do you target the up5k btw ?
<mithro>
tnt: It's what is on the Tomu FPGA (Fomu) -- plus the inbuilt SPRAM and stuff is nice
<tnt>
oh, the tomu fpga uses an up5k.
<tnt>
I thought it was an 8k on there, my bad.
<mithro>
tnt: It's better for micropython
<daveshah>
I'm excited about the mysterious 28nm FDSOI FPGAs Lattice have hinted about in their press releases