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<_whitenotifier> [whitequark/Glasgow] whitequark pushed 2 commits to master [+0/-0/±7] https://git.io/fp5mO
<_whitenotifier> [whitequark/Glasgow] whitequark 69a84a8 - arch.boneless: unswap CMP operands, actually make flags work properly.
<_whitenotifier> [whitequark/Glasgow] whitequark fcfda0e - arch.boneless: rename O flag to V flag.
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<_whitenotifier> [whitequark/Glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fp5Ys
<_whitenotifier> [whitequark/Glasgow] whitequark 6ab0603 - arch.boneless: fix instruction set summary.
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fp5YR
<_whitenotifier> [whitequark/Glasgow] whitequark 947bdf0 - arch.boneless: fix typo.
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<tnt> Is there a doc about the timing text file format ?
<daveshah> tnt: in icebox? I don't think so
<daveshah> It's generally either IOPATH <from> <to> <min>:<typ>:<max> (rising) <min>:<typ>:<max> (falling)
<tnt> yeah icebox. Trying to lookup timings directly for stuff.
<daveshah> or SETUP|HOLD <from> <clock> <min>:<typ>:<max>
<daveshah> all values in ps
<tnt> is the min/typ/max the best case / typical / worse case in icecube ? or is that something different ?
<daveshah> I'm not sure, tbh
<daveshah> I'm pretty sure there are different min/typ/max for those too (because those also alter voltage and temp iirc)
<tnt> ok.
<daveshah> I am not sure whether typ is really that useful. min is often used for hold time analysis and the like
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<bubble_buster> so what do we think clifford is doing at lattice?
<bubble_buster> is nextpnr going to be more official?
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<gruetzkopf> i heard rumors that that meeting would happen, but i know nothing about the how, where, why
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<edmoore> just check that lattice dipolmats are not leaving from the back door with lots of diplomatic bags
<q3k> i can confirm that edmund and clifford left the meeting unscathed
<daveshah> We think....
<q3k> no people with bonesaws were seen walking into the building
<gruetzkopf> did anyone xray them and check if their brains now contain ECP-4?
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<whitequark> ECP-4 more like SCP-4
<q3k> whitequark:
<whitequark> hahaha
<gruetzkopf> 12 rusty keys and a door?
<whitequark> that sounds like an old naval song
<gruetzkopf> SCP-004
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<swetland> If I had to make a bet on who would publicly if not embrace, but at least acknowledge and work with, open source tooling first, I'd lean toward Lattice -- stuff already working with their chips so they can see demonstrable interest/value, and the FPGA world is basically Xilinx and Altera(Intel now) and everyone else... folks down in the "other" category would seem more likely to take a risk to stand out
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<swetland> after them, maybe Intel, because Altera-as-part-of-Intel, I suspect, may be less focused on revenue-from-tools.
<daveshah> Even Xilinx make ~no revenue from tools
<tnt> Yeah, they're all about chips. All design house I worked with always got the xilinx tools for free from their fae.
<daveshah> I suspect they charge for Vivado for that very reason - they can give it away for "free" to make big customers feel special
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 3 commits to master [+0/-0/±19] https://git.io/fp55h
<_whitenotifier> [whitequark/Glasgow] whitequark b94da9b - gateware.boneless: use explicit ALU datapath (-16 CARRY, -11 LUT).
<_whitenotifier> [whitequark/Glasgow] whitequark bbf2464 - gateware.boneless: use explicit SRU datapath (-16 DFFESR, +16 DFFSR, +1 LUT).
<_whitenotifier> [whitequark/Glasgow] whitequark 775fdc0 - gateware: imports cleanup. NFC.
<daveshah> Charging also effectively pre-pays the high support costs of small customers using large/fancy devices
<daveshah> That is why partial reconfig was licensed for a while
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* swetland nods. that makes sense
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<_whitenotifier> [whitequark/Glasgow] marcan pushed 1 commit to master [+0/-0/±3] https://git.io/fp5F0
<_whitenotifier> [whitequark/Glasgow] marcan 6b4b9ef - revC: add ferrite bead to VUSB
<cr1901_modern> whitequark: What's the full usage of boneless like now?
<cr1901_modern> in terms of proportion of a 1k device?
<whitequark> cr1901_modern: about half
<whitequark> actually, even less
<whitequark> Info: ICESTORM_LC: 511/ 1280 39%
<whitequark> Info: Max frequency for clock 'sys_clk_$glb_clk': 41.57 MHz (PASS at 12.00 MHz)
<cr1901_modern> oh cool, not bad
<whitequark> there's a lot of room for optimization I think.
<marcan> whitequark: is this after your optimizations?
<marcan> to both boneless and the synthesizer :P
<whitequark> yes
<whitequark> pretty sure it can be *substantially* reduced in size
<cr1901_modern> if 384 had bram, you might be able to fit it there too :P
<whitequark> Info: promoting $abc$4666$n613 [cen] (fanout 16)
<whitequark> Info: promoting $abc$4666$n631 [cen] (fanout 16)
<whitequark> Info: promoting $abc$4666$n634 [cen] (fanout 16)
<whitequark> oh this is why it's slow
<whitequark> ah no
<whitequark> not on critical path
<marcan> have you considered, like... manually implementing parts of it as 4-LUTs to have a baseline human optimization? :P
<whitequark> yes. it is not necessary
<whitequark> the ALU is actually close to optimal, if not optimal
<cr1901_modern> or better yet, extract all the combinational circuits, run a QM solver for a few days :P
<whitequark> ±1 LUT
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<azonenberg_work> daveshah: re support costs
<azonenberg_work> i think xilinx already has nothing but forum support for webpack / non-industrial users
<daveshah> I know Lattice's support, at least officially, is predicated on whether your email address is commercial or not
<qu1j0t3> that's... odd?
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<bubble_buster> I thought the main issue was proprietary bitstream, not tool license revenue
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<bubble_buster> that ship has at least partially sailed and sunk for lattice right?
<bubble_buster> may as well pivot instead of continuing to lose to the 2 giants at their own game
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<hl> you'd think, but FPGA companies seem incapable of understanding this
<hl> who's to say lattice won't continue keeping their head in the sand?
<hl> the case to get a competitive advantage by opening tools was apparently once made to an executive of Xilinx and they just don't get it, apparently
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<bubble_buster> I'm tempted to make my own open fpga but I figure by the time I get something going, someone like lattice could flip the switch to being open
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<cr1901_modern> https://twitter.com/cr1901/status/1072930519980097536 cr1901 tries making a prototype: A Play in Three Acts
<hl> source: https://news.ycombinator.com/item?id=18061036 -- very interesting comment about a Xilinx VP
<hl> bubble_buster: you have access to a fab? :P
<bubble_buster> mosis
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<hl> huh, interesting service
<Finde> there are two open FPGAs under DARPA's POSH program
<Finde> we'll see where they go...
<bubble_buster> nice link, thanks
<mumptai> anyone seen a usefull open hardware zynq design?
<ZipCPU> Mumptai: Nothing public, only an open source AXI-lite slave and set of formal properties
<mumptai> i meant schematic and layout
<mumptai> (preferably kicad)
* ZipCPU waits for another to answer
<mumptai> but than, is it worth the effort to design this?
<mumptai> how many amateurs would be "dedicated" (read crazy) enough to tempt this. in the end the board would have at least 2 or 3 BGAs and half a dozen power converters
<swetland> https://www.crowdsupply.com/krtkl/snickerdoodle is a zynq platform, they don't mention a specific license but claim that schematics, bom, gerbers, etc will be published in answer to an "open source" question
<mumptai> gerbers are kinda useless, i dont' want to copy a thing 1:1, i want to modify it
<sorear> how different are the zynqs and non-zynqs from a board designer POV?
<mumptai> not much
<mumptai> power sequencing is compable to big fpgas, booting is more complex but that is handled in the toolchain, its basically the need to setup lpddr2 or ddr3 correctly
<mumptai> so "a bit" of tricky signal and power integrity stuff
<mumptai> its not tooooo complicated, just annoying and expensive to fix
<mumptai> gerbers might be nice to check how others handled that
<swetland> from the fpga side the zynqs are basically an artex or kintex -7 series with a PS7 block (the A9 complex, ddr controller, peripherals, etc exposed via a set of AXI ports)
<mumptai> i used it before
<mumptai> its kinda complex, but okay, its not that much more pain complared to the FPGA + MCU experience
<swetland> Mostly just that it's an A-series core
<swetland> if you're working bare metal they're a bit more involved than M-series to bring up
<swetland> if you're using linux, well then you're dealing with linux
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<swetland> but nothing particularly magical, just a lot of little details
<hl> 5
<hl> 5
<hl> ...whoops
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<mumptai> swetland, most cortex-m are a walk in the park in comparison
<swetland> yup
<mumptai> arm7tdmi was a pita, cortex-m is way better
<swetland> I actually am not a fan of the somewhat overly clever thread/interrupt mode stuff on -M as it's still a bit of a headache to mesh up with traditional task switching. but certainly no worse than 7TDMI
<mumptai> cortex-a with zynq has quiet some challenges, but ain't that bad once the initialization is done (also true for loading the PL via fsbl)
<swetland> the debug situation is waaaay nicer with SWD and the v5 debug interfaces
<swetland> as opposed to pushing instructions into the pipeline with jtag
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<TD-Linux> yeah one way to approach the cortex-m is just to set it up for 1 priority and no interrupt preemption
<TD-Linux> the intersection between "my application needs to have preemptible interrupts" and "my application needs to be correct to be safe" worries me
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<mumptai> hmmm, should i put a zynq minimal design in my hobby task queue?
<swetland> I normally just use lk these days. <3 lk. http://github.com/littlekernel/lk though I am a bit biased
<mumptai> like a 7010 + 16bit ddr3 and something to boot from
<swetland> it'd be neat to see something like that out there
<swetland> I'd lean toward dropping an HDMI output and an ethernet PHY + MagJack on such a critter
<swetland> as both are pretty trivial to drive and extend the reach of the base platform a bunch
<adamgreig> trenz make a bunch of similar sorts of things
<adamgreig> seems like it'd be fun to diy though
<mumptai> i don't see any reason to "copy" typical SOMs or eval baords
<swetland> yeah, there's a number of SOMs out there, though they tend to be rather pricey
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<mumptai> this is not goona be cheap either
<TD-Linux> zynq has a native rgmii block iirc
<mumptai> very likely more expensive for small batches
<mumptai> the only thing in favor is the fact that the rather expensive board-to-board connectors are eleminated
<swetland> ouch. smallest zynq in qty1 from digikey is $46
<mumptai> TD-Linux, correct
<mumptai> TD-Linux, two actually
<swetland> yeah there's some interesting choices with zynq as far as hooking stuff up to the SoC complex pins or FPGA IOs
<daveshah> swetland: no significant discount for qty1000 from Arrow UK either
<mumptai> cheapest zynq board ist also around 100€ and the SOMs are 180€
<mumptai> and more
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<swetland> I dunno if I've ever seen price breaks for xilinx or altera fpgas from any distributor
<swetland> if you're not big enough to buy direct, you suffer, appears to be the state of things
<daveshah> This was a custom quote
<adamgreig> from what i hear the distributor prices are all very inflated though
<adamgreig> buying direct is a big win
<daveshah> Distributor stock of FPGAs is often awful too
<daveshah> Quite common to only see 10s in stock
<mumptai> but whats the threshold?
<swetland> often if you're a hobbyist or small shop, getting time of day from direct sales is rough going
<daveshah> I guess 10k-1M depending on the part
<daveshah> Something like ice40 you'd have to buy near enough 1M to get attention from Lattice
<swetland> I've only ever dealt with things as a hobbyist or as a Google employee. widely differing experiences, obviously ^^
<mumptai> yeah name dropping helps
<swetland> for some of the larger devices, 50-100k is "quantity" (which surprised me, I was expecting 1-5M)
<mumptai> but this open thing won't do the trick
<cr1901_modern> I was able to buy direct from a fabless company for a period of time after a really botched attempt to buy from a distributor. Don't think I can take advantage of it today tho.
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<cr1901_modern> it was like "we're sorry you had such a bad time, email us next time and we'll get you the parts you need"
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<daveshah> Kynix have some good prices on Zynqs. No idea how legit they are, but I bought about 3 Artix-7s (wanted a package/grade that was OOS everywhere) from them once and it was fine
<mumptai> yes, distributors can be annoying from time to time
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<mumptai> XC7Z010-1CLG400I 1+: $23.62976
<swetland> that strikes me as a pretty non-terrible price for single digit units
<daveshah> Probably production surplus
<daveshah> I'd be fine with Kynix for a hobby project
<daveshah> As I say my one experience with them was fine
<daveshah> But I wouldn't use them for a space shuttle or anything
<mumptai> same part is $72,17 at digikey
<mumptai> maybe student cubeSat?
<daveshah> Rumoured volume pricing for Zynqs is around $10-15
<daveshah> But I suspect that would be 100ks direct from Xilinx before you got that
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<mumptai> the prices also vary at kynix, might be surplus or some production left-overs
<mumptai> the same part in "c" temperature range is 8 usd more expensive
<mumptai> i'm not sure if there is a valid reason for not using a SOM, besides the need for special formfactors. especially for hobby stuff and open-hardware
<mumptai> any small batch run is easily as expensive as a SOM based solution
<mumptai> I kinda don't care about that fact. But I assume that this is probably the reason why there is no such open-hardware design available
<mumptai> also dealing with schematics to linux, and everything in between, might be unappealing to many
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<mumptai> Anyone with recommendations about routing ddr3?
<mumptai> or just a case of follow the mfg's recommendations?
<mumptai> so basically: Anyone with meta-recommendations about routing ddr3?
<daveshah> I've always just followed random appnotes
<daveshah> The only time ddr3 hasn't worked for me is when I speced a 240k Zq resistor on the BOM instead of 240r
<daveshah> Luckily that one was easy enough to fix, after a day of debugging though
<mumptai> i guess that is the nature of the game
<daveshah> I'd recommend a 6 layer board, makes things easier and not too big a price gap these days
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<mumptai> that would have been my 1st choice
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<mumptai> and a layerstack like: signal, power plane, signal, signal, power plane, signal ?
<daveshah> Yeah
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<mumptai> i actually can't think of a diffrent one that appears sensible
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<sorear> huh. First I've seen the "240r" notation
<daveshah> Quite common on schematics etc
<daveshah> If you cba to find the ohm symbol or type ohm
<mumptai> some also replace the dot with it: 2.2 Ohm is written as 2R2
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<daveshah> Yeah, that's from the days of printed schematics where a dot could be hard to see
<daveshah> or confused for dirt, or lost in photocopying etc
<mumptai> and copier either added or removed them
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<sorear> these days, copiers just replace entire digits at random /s
<qu1j0t3> you'll also see 2K2, 1M5 etc
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<pie__> sorear, heh
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