<tnt> Info: Max frequency for clock 'clk_c': 65.42 MHz (PASS at 48.00 MHz)
<_whitenotifier> [Glasgow] Bl4ckb0ne starred Glasgow - https://git.io/v6BuO
<tnt> Adding constraint for the LF/HFOSC is pretty easy :p
azonenberg_work has joined ##openfpga
Miyu has quit [Ping timeout: 245 seconds]
lexano has joined ##openfpga
<tnt> daveshah: Now the question is how I can get this upstreamed :p Do you prefer one large PR with "ice40 improvements" and all the stuff in it (still split in commits of course) ? Or should I go small pieces by small pieces ?
lovepon has quit [Ping timeout: 244 seconds]
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 3 commits to master [+1/-1/±5] https://git.io/fpcAi
<_whitenotifier> [whitequark/Glasgow] whitequark 805144e - arch.jtag: fix typo.
<_whitenotifier> [whitequark/Glasgow] whitequark e1cc6d4 - database.arc: add ARC7xx IDCODEs.
<_whitenotifier> [whitequark/Glasgow] whitequark 595765f - applet.jtag.{mec1618→mec16xx}: rename.
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 1 commit to master [+1/-0/±0] https://git.io/fpcAP
<_whitenotifier> [whitequark/Glasgow] whitequark a950efd - arch.arc.mec16xx: add Flash IP registers.
<_whitenotifier> [Glasgow] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/whitequark/Glasgow/builds/456783593?utm_source=github_status&utm_medium=notification
<_whitenotifier> [Glasgow] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/whitequark/Glasgow/builds/456783736?utm_source=github_status&utm_medium=notification
futarisIRCcloud has joined ##openfpga
balrog has quit [Quit: Bye]
balrog has joined ##openfpga
unixb0y has quit [Ping timeout: 268 seconds]
unixb0y has joined ##openfpga
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 2 commits to master [+0/-0/±3] https://git.io/fpcpT
<_whitenotifier> [whitequark/Glasgow] whitequark 5ff919b - applet.jtag: enter Run-Test/Idle in JTAGInterface.run_test_idle.
<_whitenotifier> [whitequark/Glasgow] whitequark c29752b - applet.jtag.mec16xx: add emergency-erase command.
<_whitenotifier> [Glasgow] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/whitequark/Glasgow/builds/456792428?utm_source=github_status&utm_medium=notification
<_whitenotifier> [whitequark/libfx2] whitequark pushed 1 commit to master [+0/-0/±2] https://git.io/fpcpE
<_whitenotifier> [whitequark/libfx2] whitequark faae802 - Add back compatibility with sdcc 3.5.
<_whitenotifier> [whitequark/libfx2] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpcpz
<_whitenotifier> [whitequark/libfx2] whitequark 7bcc13b - Fix warnings in boot-dfu.
Laksen has quit [Quit: Leaving]
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpchV
<_whitenotifier> [whitequark/Glasgow] whitequark de0710e - firmware: update libfx2.
<whitequark> balrog: hey, question
<whitequark> think you can find a programming algo for MEC1609/MEC1618?
<whitequark> I found only one in SVODprogrammer and it's obfuscated to hell and beyond
<whitequark> I'm following the docs in MEC1618 DS but can't seem to get it to go anywhere from the Erase state
<whitequark> balrog: so, I'm following section 13.11
<whitequark> and 13.9
<whitequark> I've successfully Mass Erased the thing
<whitequark> when it boots, it gets stuck in Flash_Command.Flash_Mode=Erase
<whitequark> with Flash_Config.Reg_Ctl_En=1 and .Host_Ctl=1
<whitequark> except that last read seems kind of flakey?
<whitequark> anyway, I can reset or not reset Host_Ctl to 0
<whitequark> but it ignores all writes to Flash_Command
<_whitenotifier> [Glasgow] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/whitequark/Glasgow/builds/456803399?utm_source=github_status&utm_medium=notification
rohitksingh_work has joined ##openfpga
rohitksingh_wor1 has joined ##openfpga
rohitksingh_work has quit [Ping timeout: 244 seconds]
rohitksingh_work has joined ##openfpga
rohitksingh_wor1 has quit [Ping timeout: 268 seconds]
<whitequark> wtf
Miyu has joined ##openfpga
rohitksingh_wor1 has joined ##openfpga
GenTooMan has quit [Quit: Leaving]
rohitksingh_work has quit [Ping timeout: 244 seconds]
Miyu has quit [Ping timeout: 252 seconds]
lovepon has joined ##openfpga
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 3 commits to master [+0/-0/±3] https://git.io/fpCfn
<_whitenotifier> [whitequark/Glasgow] whitequark 5e82182 - applet.jtag.arc: display failed transaction status.
<_whitenotifier> [whitequark/Glasgow] whitequark e2a0c7d - cli: add --filter-log, for raising the log level of a single component.
<_whitenotifier> [whitequark/Glasgow] whitequark 466ba67 - applet.jtag: split logging into JTAG-L[owlevel] and JTAG-H[ighlevel].
<_whitenotifier> [Glasgow] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/whitequark/Glasgow/builds/456827561?utm_source=github_status&utm_medium=notification
<SolraBizna> why is it so hard to implement complicated serial protocols from a shell script
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
<whitequark> why are you trying to do cursed things
<azonenberg_work> lol
<azonenberg_work> whitequark: always with the good questions ;p
<SolraBizna> when I didn't realize how much the Arduino's bootloader was going to get in the way, it was because I didn't want to raise a barrier to running these tests on random other Linux systems
<SolraBizna> who knew I was raising a barrier to myself running these tests at all :O
pie_ has quit [Ping timeout: 256 seconds]
lovepon has quit [Ping timeout: 250 seconds]
<daveshah> mithro/tnt: I will work on derived timing constraints as part of my university project
<daveshah> So no need to worry about this, it's on list for the near future
m4ssi has joined ##openfpga
Miyu has joined ##openfpga
gnufan has quit [Ping timeout: 245 seconds]
Flea86 has joined ##openfpga
<tnt> daveshah: ok :)
<tnt> daveshah: btw, did you see my question about the best way to get all that upstreamed ?
<daveshah> tnt: there are no regressions against master now?
<daveshah> In which case, run make clangformat and submit a PR
<daveshah> We always prefer smaller and more frequent PRs
<tnt> yup, it all works. Just finished cleaning up all the commits. I can probably make 4 PRs (1) generic placement improvement (2) Misc small fixes (3) Globalnet support for PLL/SB_IO/HFOSC/LFOSC (4) RGBA support . But they sort of depend of each other (at least 2,3,4 ... mostly because of some helpers functions) so I'll need to wait for the previous one to be merged before submitting the next.
<daveshah> 1 PR is fine in this case too
<tnt> Mmm, make clangformat just says "No such file or directory"
<tnt> Oh ... but it did actually do stuff.
<tnt> Gotta go now, but I'll merge those formatting fixes in their respective commits this afternoon and open the PR.
<daveshah> awesome, thanks
gnufan has joined ##openfpga
specing has quit [Quit: ZNC - https://znc.in]
specing has joined ##openfpga
digshadow has quit [Excess Flood]
digshadow has joined ##openfpga
digshadow has quit [Excess Flood]
digshadow has joined ##openfpga
digshadow has quit [Excess Flood]
digshadow has joined ##openfpga
rohitksingh_wor1 has quit [Ping timeout: 246 seconds]
diamondman has quit [Ping timeout: 264 seconds]
diamondman has joined ##openfpga
rohitksingh_work has joined ##openfpga
rohitksingh_wor1 has joined ##openfpga
rohitksingh_work has quit [Ping timeout: 268 seconds]
<tnt> daveshah: there, done ... now, just needs to be reviewed :P
<daveshah> brilliant, I'll go through them this afternoon
<tnt> Oh ... github is weird ...
<tnt> it sorts commit per _date_ and not in the order they're applied.
<tnt> (and with all the rebase and cleanup, the dates are ... meaningless)
<jn__> commitdate would be almost useful, but authordate… meh
<tnt> "If you always want to see commits in order, we recommend not using git rebase" ...
<tnt> WTF github ...
<tnt> daveshah: tx. I would recommend using git rahter than the web interface, because making sense of the logic between them when they're shuffled is going to be tricky :p
Bike has quit [Ping timeout: 272 seconds]
rohitksingh_wor1 has quit [Read error: Connection reset by peer]
Bike has joined ##openfpga
rohitksingh has joined ##openfpga
m4ssi has quit [Remote host closed the connection]
jevinskie has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
m4ssi has joined ##openfpga
Flea86 has quit [Quit: Goodbye and thanks for all the dirty sand ;-)]
jevinskie has joined ##openfpga
jevinskie has quit [Client Quit]
rohitksingh has quit [Ping timeout: 260 seconds]
jevinskie has joined ##openfpga
jevinskie has quit [Ping timeout: 268 seconds]
jevinskie has joined ##openfpga
jevinskie has quit [Client Quit]
rohitksingh has joined ##openfpga
genii has joined ##openfpga
jevinskie has joined ##openfpga
rohitksingh has quit [Ping timeout: 244 seconds]
<tnt> daveshah: thanks for the review.
<tnt> daveshah: Is that what you meant with the assignCellInfo thing ? https://pastebin.com/C2Nxu3FX
drawkula has quit [Quit: WeeChat 2.3]
<daveshah> tnt: yeah, looks good
<daveshah> bool attributes should use 1/0 though
<daveshah> also should be cell->attrs in the assign function
<cr1901_modern> tnt: Yea sorry I didn't have time to test your PR. Unforeseen circumstances.
<tnt> daveshah: oh yeah right, this was untested, just to see if I understood correctly.
<tnt> cr1901_modern: it's ok, in the end, turns out I have a tinyfpga BX :p
<cr1901_modern> Cool, then I imagine you can test on your end then :)?
<tnt> cr1901_modern: yeah, that's been fixed.
<tnt> cr1901_modern: turned out to be that the PLL selected by nextpnr didn't exist in that chip :p
GenTooMan has joined ##openfpga
rohitksingh has joined ##openfpga
rohitksingh has quit [Ping timeout: 245 seconds]
<tnt> daveshah: Where would you put that constatns ? (64).
<tnt> daveshah: Also, yeah, I picked 64 because I actually wanted mult and ramb of the ice40 in there ... trying random places to find one to swap with seemed a bit of a waste for ram as well. And sure you loose the radius check, but I'm not sure how much that's an issue.
<daveshah> yeah, should be fine for BRAM actually
<daveshah> put the constant in Placer1Cfg for now
rohitksingh has joined ##openfpga
m4ssi has quit [Quit: Leaving]
ym has quit [Remote host closed the connection]
mumptai has joined ##openfpga
m_w has joined ##openfpga
rohitksingh has quit [Ping timeout: 250 seconds]
<mithro> whitequark: Do you have an list of your "magic" mangled C++ symbols anywhere?
<q3k> Traceback (most recent call last):
<q3k> File "/build/source/ecp5/trellis_import.py", line 381, in <module>
<q3k> main()
<q3k> File "/build/source/ecp5/trellis_import.py", line 376, in main
<q3k> bba = write_database(args.device, chip, ddrg, "le")
<q3k> File "/build/source/ecp5/trellis_import.py", line 225, in write_database
<q3k> bba.u32(constids[ddrg.to_str(bp.pin)], "port")
<q3k> KeyError: 'P4'
<q3k> daveshah: ^
<daveshah> q3k: what commit of nextpnr and Trellis?
<q3k> trellisdb: 2dd0eda949d1d7f2854086a3a8b476a475967442
<q3k> trellis: 363845c9bbfbe5b163bb39b9ff4fa1a094d902a6
<q3k> nextpnr: 1851ebb1c6b9edc2d8396494864fa7fa3b833c9d
<q3k> or maybe my nextpnr is actually older, hold on
<daveshah> Sounds like you have a version of nextpnr from before DSPs were added
<q3k> yeah, mayhaps
<q3k> yeah, apologies, i misunderstood nix :P
<whitequark> mithro: magic?
<whitequark> how so?
<mithro> whitequark: cursed maybe better word :-P
<whitequark> mithro: which ones specifically
<mithro> whitequark: any? Just want some torture tests to give someone who just wrote a demangler
<whitequark> uh, not offhand, sorry
<whitequark> feed glibc++ into it
<cr1901_modern> whitequark: Where's that tweet of yours that crashes your binja plugin
<cr1901_modern> that's a good torture test
ym has joined ##openfpga
<whitequark> it's just a million laughs attack
m_w has quit [Ping timeout: 264 seconds]
Patater_ has joined ##openfpga
cr1901_modern1 has joined ##openfpga
eightdot_ has joined ##openfpga
keesj_ has joined ##openfpga
finstern1s has joined ##openfpga
q3k1 has joined ##openfpga
Flux42_ has joined ##openfpga
eightdot has quit [Ping timeout: 268 seconds]
cyrozap has quit [Ping timeout: 268 seconds]
lexano has quit [Ping timeout: 268 seconds]
SpaceCoaster has quit [Ping timeout: 268 seconds]
Patater has quit [Ping timeout: 268 seconds]
wpwrak has quit [Ping timeout: 268 seconds]
Morn_ has quit [Ping timeout: 268 seconds]
finsternis has quit [Ping timeout: 268 seconds]
keesj has quit [Ping timeout: 268 seconds]
cr1901_modern has quit [Ping timeout: 268 seconds]
Flux42 has quit [Ping timeout: 268 seconds]
q3k has quit [Ping timeout: 268 seconds]
indy has quit [Ping timeout: 268 seconds]
qu1j0t3 has quit [Ping timeout: 268 seconds]
Morn_ has joined ##openfpga
qu1j0t3 has joined ##openfpga
indy has joined ##openfpga
cyrozap has joined ##openfpga
wpwrak has joined ##openfpga
SpaceCoaster has joined ##openfpga
lexano has joined ##openfpga
jevinskie has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
jevinskie has joined ##openfpga
mumptai has quit [Quit: Verlassend]
<_whitenotifier> [whitequark/Glasgow] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fpWB9
<_whitenotifier> [whitequark/Glasgow] whitequark 1f6a504 - applet.jtag: use minimal path through TAP state machine.
<_whitenotifier> [whitequark/Glasgow] whitequark afd5f7a - applet.jtag.arc: use Run-Test/Idle to initiate transactions.
m_w has joined ##openfpga
<_whitenotifier> [Glasgow] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/whitequark/Glasgow/builds/457215017?utm_source=github_status&utm_medium=notification
cr1901_modern1 has quit [Quit: Leaving.]
cr1901_modern has joined ##openfpga
finstern1s is now known as finsternis
<tnt> daveshah: so what's the next step now ?
<daveshah> tnt: I'll give others a chance to review if they want then it can be merged
<daveshah> I'm mostly afk tomorrow though
q3k1 is now known as q3k