<whitequark> cr1901_modern: you could even use something like Souper
<whitequark> i.e. use an SMT solver to automatically find *the* optimal sequence of instructions
<cr1901_modern> Oh crap, that sounds awesome. And I see John Regehr's name on it!
<fseidel> sorear: so A53 can dual issue 2 dependent adds?
<sorear> yes
<sorear> because it's designed to operate at clock cycles longer than 2 back-to-back simple ALU operations
<sorear> so it just forwards the result sideways in the same pipe stage
<cr1901_modern> Stupid idle thought: I wonder if that saves energy as well compared to computing the result twice, or if the detection circuitry for that offsets the power savings.
<implr> obviously the mill is the future
<implr> [mild irony]
<whitequark> lol the mill
<fseidel> neat
<cr1901_modern> isn't that vaporware?
<fseidel> oh yeah, I forgot mill was a thing, it's been coming soon for the last 10-15 years, right?
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<rqou> heh, latest nurdrage is kinda neat
<rqou> only problem is that the amount of sodium he got over 3 days of reacting is only worth like $30
<implr> cr1901_modern: yes, but they are actually doing something - I know some people who responded to their 'work for us for free (except equity)' offer in the past ~year
<implr> and they were working on a llvm port and similar stuff
<sorear> have any of the mill patents expired yet
<implr> I give mill less that 1% chance of becoming a major arch, but I'd still love to see them on the market, they had many interesting ideas
<sorear> not that i'd want to use them
<implr> sorear: just checked their page, it seems they haven't even filed them all yet
<implr> >As of May 8, 2018, 14 of our patents have been granted.
<sorear> so you realize intel is still filing patents?
<sorear> "still filing patents" is not interesting for a non-dead arch
<q3k> 'filing patents' is not interesting
<implr> meh, I phrased that badly
<implr> I just meant to say that there's no way they're anywhere close to expiring if they just started filing recently
<implr> I just want to see an itanium 2.0, even if it fails spectacularly it'll still be amusing
<whitequark> if they're filing patents that makes it far less interesting
<sorear> it's cute that they think they'll ever have the revenue to protect, yes
<fseidel> any of you guys have something negative to say about the XC9500XL family, or is it a good choice?
<rqou> PLAs > PALs
<whitequark> why even bother with a CPLD?
<whitequark> 5V tolerance?
<rqou> if you're a weirdo like my father and need the fast deterministic timing?
<cr1901_modern> 5v tolerance, and many families require external flash. Other than that, idk
<cr1901_modern> Oh and "no need to wait to boot" :P?
<rqou> coolrunner-ii has a boot time :P
<whitequark> there are FPGAs with embedded flash
<whitequark> i think uhh actel?
<cr1901_modern> Right, mach is one of them
<fseidel> I need 5V tolerance
<whitequark> that makes sense
<rqou> i don't think xc9500xl is 5v tolerant?
<cr1901_modern> it is
<fseidel> looks like it is from the datasheet
<sorear> mach has a boot time too
<rqou> hmm ok
<cr1901_modern> right b/c it's an fpga.
<sorear> but it's a load-a-row-at-a-time boot, not serial
<sorear> few µs
<cr1901_modern> I would prob use mach and eat the cost of voltage shifters (NON autosensing ones)
<fseidel> why is that?
<rqou> i'd use maxv :P
<fseidel> I'm new to board design (this is my first PCB ever), so I was trying to reduce component count
<rqou> maxv needs basically no external parts
<cr1901_modern> fseidel: Oh, nothing more than personal preference
<whitequark> i'd use ice40 and voltage shifters :P
<whitequark> mostly because of toolchain availability
<whitequark> autosensing voltage shifters do make sense... if you understand their issues
<fseidel> I'm far more used to Altera's toolchain, so MAX V is attractive, but I didn't think it was 5V tolerant
<rqou> well yeah, i need to get kinglerpar more working
<rqou> you add series resistors or whatever
<fseidel> I have an easy signal I can tap to use a non-autosensing voltage shifter
<whitequark> rqou: or just use nextpnr
<whitequark> oh right, kingler is analytical
<cr1901_modern> whitequark: I thought your issue w/ autosense was "it's too easy to drive them in the opposite direction than intended"
<whitequark> cr1901_modern: no
<whitequark> well
<whitequark> they're obviously the wrong choice for glasgow, but i had no choice for the non-bga revisions
<whitequark> the ones with pullups are useless for anything that isn't i2c
<whitequark> the ones without pullups have signal integrity issues and can't tolerate pullups, so you don't get i2c
<whitequark> or can't use them to program a target that has e.g. pullups on CS pins or whatever
<whitequark> or reset
<cr1901_modern> and seeing that "fun" you had a few months back made me think "unless I'm using I2C, I'll eat the dir pin"
<whitequark> fxmas can't be used for i2c
<cr1901_modern> just a general comment about when I'd use them :)
<whitequark> i'd use them in a case where i designed the entire board
<whitequark> and have a bidi bus
<whitequark> which is pretty rare, really
<fseidel> anyway, I need to go catch a flight
<fseidel> thanks for the help!
<cr1901_modern> don't be a stranger :P
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* cr1901_modern goes looking for his missing pair of socks that disappeared between starting this chat and now Always something exciting that happens when I actually chat in this room lol
<azonenberg_work> fseidel, cr1901_modern: greenpak can run at VDD=5V
<azonenberg_work> as long as yo dont need much logic :p
<balrog> azonenberg_work: how much logic does it have that handles 5 volts?
<azonenberg_work> balrog: the slg46620 has i think ten counters, a dozen ffs, two shift regs, 26 LUTs
<azonenberg_work> It's 180nm TSMC
<cr1901_modern> You can get up to 16 ffs if you're creative w/ shift regs
<azonenberg_work> each shreg is 16 ffs
<azonenberg_work> With two taps at bitstream-programmable (not runtime adjustable sadly) offsets, and an optional inverter on one of the taps
<cr1901_modern> right, you use the two taps of each shreg, and you can get 4 ffs... _if_ you're creative :3
<cr1901_modern> sadly not enough logic to make a UART :(
<cr1901_modern> well in both dirs
<azonenberg_work> eh
<azonenberg_work> i have managed to make some degree of a uart
<azonenberg_work> sending a fixed byte at least
<cr1901_modern> I wanted both in one chip :P. Certainly I imagine sending is easy enough. Recving might be tougher
<rqou> a uart with tx+rx plus some basic logic takes up ~95% of an xc2c32a
<fseidel> I need a lot more 5V I/O than that
<rqou> at least when i coded it
<azonenberg_work> cr1901_modern: well pin count is an issue
<azonenberg_work> i dont even think there are enough GPIOs
<fseidel> need 32-bit address and data busses for 68030 interface, then 16-bit data and 24-bit address for connecting up to the original 68K bus
<cr1901_modern> And a 64 channel logic analyzer :) (must be nice to have access to equipment :P)
<fseidel> I've got a 136 channel logic analyzer on my desk that I got for $50 :-)
<fseidel> HP 1660CS
<fseidel> CRT needs some adjustment but it's a lovely scope
* cr1901_modern doesn't have a scope. No room, no money for a good one
<fseidel> I've heard that old HP equipment is generally the best way to get good stuff for cheap, but the issue is that they use CRTs and take up a lot of space
<cr1901_modern> I'm sure if I scrounged around on CL or fleabay I could find something...
<cr1901_modern> 87* even
<awygle> formerly-Actel-then-Microsemi-now-Microchip FPGAs have integrated flash and essentially no boot time
<awygle> the flash cells are the config memory, no SRAM intermediary
<awygle> idk about 5V tho, i think maybe some SKUs support it? i'd have to research more
<cr1901_modern> soon enough one will have to use individual mosfets on each line b/c they'll deprecate level shifters that work at 5V :D
<fseidel> lol
<awygle> mosfets for the mosfet god
<implr> eh, I can never find decent used gear in Europe, everything seems to be in the USA :(
<balrog> bleh. microchip is putting avr-gcc behind a license wall
<balrog> (their avr-gcc driver blocking use of -O levels above -O1)
<fseidel> ewww, gross
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<balrog> fseidel: I was hoping this wouldn't happen, but I'm not surprised
<balrog> which is funny, because avr-gcc and avr-libc are mostly community work.
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<qu1j0t3> fseidel: +1
<awygle> balrog: that's total garbage. Avr is in upstream gcc tho, and in llvm.
<awygle> Err I think it's in gcc... I could be wrong.
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<awygle> There's a fiber drop running into the network panel in my apartment, then into a silver box with an F-type RF output, which runs into my cable modem, which puts out RJ-45 to my router... Which has a fiber input port on it.
<awygle> I sincerely doubt that just plugging the fiber in directly would work, but it *feels* like it should
<awygle> Also it's cool my apartment has a somewhat legit network panel
<azonenberg_work> awygle: it's probably GPON
<azonenberg_work> not something sane like base-X
<azonenberg_work> Is there a model number on the silver box?
<awygle> CP8015U-02-00 Rev. D.2
<awygle> "SDU RFoG CPE"
<awygle> Oh wow RFoG is crazy
<awygle> Or perhaps the opposite of crazy, it seems extremely brute force. "what if docsis, but over fiber"
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<azonenberg_work> Lol
<azonenberg_work> awygle: never understimate the amount of money and effort people will spend to allow them to continue using legacy gear
<azonenberg_work> or legacy cable plants (docsis exists for this sole reason)
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<Prf_Jakob> fseidel: I don't think you need to put the FPGA between the MC68030 and the MC68k bus.
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<fseidel> Prf_Jakob: was on a plane, came to same conclusion mid-flight :-P
<fseidel> I forgot that when 680x0s are halted, they tristate both the address and data buses
<fseidel> so only the control pins need to be driven by CPLD logic
<Prf_Jakob> Great minds think alike :p
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<whitequark> I want this for cardedge :D
<gruetzkopf> ooh
<gruetzkopf> and sliprings
<pie__> huh.
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<q3k> oh yes, even more of this crap
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