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<cr1901_modern> So I think the best solution for now is simply for me to clone the part and place in a name-conflicts.lib library
<azonenberg> cr1901_modern: lol
<cr1901_modern> fortunately, #kicad has a sense of humor and they relate very much to my predicament. So that's good
<azonenberg> My ruile is simply
<azonenberg> do not use default libs
<azonenberg> bye-bye conflicts :P
<azonenberg> In other news, although some blocks like LUTs in the slg46140 have the same bitstream layout as the 46620
<azonenberg> others, like the oscillators, decidedly do not
<azonenberg> grrreat
<cr1901_modern> Yay, things aren't going right for both of us :D. Wait... that's bad
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<azonenberg> aaand lol
<azonenberg> the DFFs in the 46140v have Q and nQ outputs
<azonenberg> The dedicated DFFs*
<azonenberg> They could not *possibly* have made things more awkward for me...
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<azonenberg> aaaand
<azonenberg> the ring oscillators are different speeds
<azonenberg> in the 46140 vs 46620
<azonenberg> lool
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<azonenberg> grrrr
<azonenberg> support for the slg46140 will be a pain in the butt b/c so many blocks have different bitstream coding from the 46620
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<openfpga-github> [yosys] azonenberg pushed 1 new commit to master: https://git.io/vPjjS
<openfpga-github> yosys/master d9d38ee Clifford Wolf: Bugfix in fsm_map for FSMs without reset state
<openfpga-github> [openfpga] azonenberg pushed 3 new commits to master: https://git.io/vPjj7
<openfpga-github> openfpga/master ea537e4 Andrew Zonenberg: greenpak4: Continued SLG46140V support
<openfpga-github> openfpga/master 8692e3e Andrew Zonenberg: greenpak4: Added bandgap support for SLG46140
<openfpga-github> openfpga/master f968033 Andrew Zonenberg: greenpak4: Added GP_DELAY support for SLG46140V
<openfpga-github> [openfpga] azonenberg force-pushed gh-pages from 3d9a493 to 8e1b4d4: https://git.io/v6vmV
<openfpga-github> openfpga/gh-pages 8e1b4d4 Travis CI User: Update documentation
<openfpga-github> [openfpga] azonenberg pushed 1 new commit to master: https://git.io/vXeem
<openfpga-github> openfpga/master 9685050 Andrew Zonenberg: greenpak4: Implemented GP_POR for SLG46140V
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<openfpga-github> openfpga/master 43627e9 Andrew Zonenberg: greenpak4: Added pin 13 reset output support for SLG46140V
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<openfpga-github> openfpga/gh-pages faa345b Travis CI User: Update documentation
<openfpga-github> [openfpga] azonenberg pushed 1 new commit to master: https://git.io/vXeeP
<openfpga-github> openfpga/master 15551d3 Andrew Zonenberg: greenpak4: Implemented pin 2 reset for SLG46140V
<openfpga-github> [openfpga] azonenberg pushed 1 new commit to master: https://git.io/vXee1
<openfpga-github> openfpga/master 3d2e071 Andrew Zonenberg: doc: Mention that IO pad precharge is not supported
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<openfpga-github> [openfpga] azonenberg force-pushed gh-pages from 0e93978 to 03dee5c: https://git.io/v6vmV
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<azonenberg> Welp this is progress
<azonenberg> Still have a looong todo
<azonenberg> But it's moving, slowly
<azonenberg> I want to try and do a very extensive test suite that exercises each hard IP core over the coming weeks
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<openfpga-github> [openfpga] azonenberg pushed 1 new commit to master: https://git.io/vXefW
<openfpga-github> openfpga/master 34536e0 Andrew Zonenberg: gp4prog: implemented --blink argument
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<azonenberg> sooo now that i have the capability to do HiL testing
<azonenberg> I think the next step is to add the ability to make verilog testbenches
<azonenberg> rather than building a C++ executable for each test
<azonenberg> Hmm, iverilog is probably the best simulator to use for this?
<azonenberg> unless someone has a better idea
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<azonenberg> Going to try making a verilog PLI wrapper that does the dirty work
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<cr1901_modern> verilator?
<azonenberg> any reasons to pick one or the other?
<azonenberg> I have no strong feelings at this time
<openfpga-github> [openfpga] azonenberg pushed 3 new commits to master: https://git.io/vXeI8
<openfpga-github> openfpga/master 2f893bd Andrew Zonenberg: doc: updated to reflect that SLG46140V GP_LFOSC has different frequency
<openfpga-github> openfpga/master e111401 Andrew Zonenberg: greenpak4: added initial work on SLG46140V co-simulation using iverilog
<openfpga-github> openfpga/master fde16f6 Andrew Zonenberg: tests: added subdirectory for slg46140 specific tests
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<openfpga-github> [openfpga] azonenberg pushed 1 new commit to master: https://git.io/vXeqe
<openfpga-github> openfpga/master fddece6 Andrew Zonenberg: gpcosim: added initial version of verilog PLI co-simulation wrapper. Doesn't do anything useful yet.
<cr1901_modern> azonenberg: Well, I've only used iverilog. Just heard that verilator is also good.
<azonenberg> well in theory the PLI module is portable across sims
<azonenberg> So, i guess we'll find out if i move :p
<openfpga-github> [openfpga] azonenberg force-pushed gh-pages from 44d70c3 to 835517b: https://git.io/v6vmV
<openfpga-github> openfpga/gh-pages 835517b Travis CI User: Update documentation
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<rqou> portable PLI modules? hah
<rqou> specs are made to be broken :P
<azonenberg> lol
<rqou> and then there are super gross hacks like VPI for GHDL
<rqou> which ironically works better than the alternative
<rqou> GHDL has a PLI interface that they invented called AVHPI
<rqou> it's VHPI but with an Ada interface rather than a C interface
<rqou> aka nobody's going to deal with that
<rqou> somebody really needs to design a "actually works cosimulation interface"
<rqou> maybe ##openfpga can? :P
<azonenberg> lol
<rqou> btw GHDL has this amazing sentence in its documentation: "This function must be called once, and returns 0 at the end of the simulation. In case of failure, this function does not return. This has to be fixed."
<azonenberg> rqou: fwiw my last project along these lines used ISim
<azonenberg> which does not even support PLI
<azonenberg> so i had to use $fread/$fwrite with pipes
<azonenberg> :p
<rqou> i hate EDA tools
<rqou> I didn't even realize those functions existed
<rqou> aaand I just realized GHDL's documentation doesn't actually mention it supports VPI
<rqou> you have to Use The Source(TM) to find out
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<azonenberg> lol eda is a nightmare
<azonenberg> why do you think we're all here? :p
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* nats` is here because he's a spy for the account of the Grand EDA Master From Hell
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<rqou> holy **** let's encrypt now supports IDNs
<rqou> need to update my certs now
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<rqou> aaand it doesn't work
<rqou> good job let's encrypt
<plaes> :)
<rqou> 'Name does not end in a public suffix'
<rqou> where the subject in question is "xn--j6w193g" aka "香港"
<rqou> maybe whitequark will be sad now? :P
<rqou> anyways, good thing that firefox refuses to propagate HKPK from private browsing into normal
<rqou> *HPKP
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<cr1901_modern> let's encrypt is not user friendly. And I KNOW they're really trying.
<cr1901_modern> Can't tell if this is b/c security is legit hard, or this is a side effect of professionals willingly making it inaccessible for years.
<rqou> this has nothing to do with user friendliness
<rqou> it's outright a bug
<cr1901_modern> Oh, that's good. 10/10 would break again
<rqou> hey, the .hk registrar bundles a free .香港 with all .hk domains
<rqou> so I can test all your IDN code
<rqou> (although I actually bought this domain specifically for the .香港 and not the .hk)
<rqou> I specifically got this domain so I could get the 龘 character
<rqou> it's one of the BMP characters with the most number of strokes
<rqou> there's some more chinese characters with more strokes in the astral planes, but last time I tried HKIRC doesn't allow astral plane characters
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<rqou> offtopic: I have brought back to life the old registry of tuples of 16-bit integers at f055.cc (now redirects to f055.io)
<rqou> hooray for archive.org
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<DocScrutinizer05> >>you would need at least 800 millizonenbergs to crack it<< [#kicad] :-D
<DocScrutinizer05> <c4757p> Physical Unclonable Function. basically a way to make a secure signature of a piece of hardware that can't be copied onto another piece of similar hardware without serious effort <xzcvczx> #define serious effort? like decapping sort of effort or? <cyborgar_> you would need at least 800 millizonenbergs to crack it
<azonenberg_work> lol
<azonenberg_work> some PUFs are pretty easy to clone gievn the right gear
<azonenberg_work> for example, SRAM that powers up to a certain value
<azonenberg_work> you can use backside photon emission etc to read it out
<azonenberg_work> then given a new chip you can FIB the ram to weaken one half or the other of the sram inverter loop
<azonenberg_work> so it still works but is biased in one direction or the other
<azonenberg_work> somebody did a paper on that a while ago
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<rqou> how many millizonenbergs do we need to mount more backside attacks?
<rqou> at least 1100?
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<rqou> XNU kernel is a much bigger pile of duct tape than I thought
<azonenberg_work> lol
<rqou> i'm no longer sure which of Linux/XNU/NT have more duct tape in the kernel
<azonenberg_work> they all suck
<azonenberg_work> only question is how hard in which ways
<azonenberg_work> any idea what the free/open BSD kernel looks like these days?
<rqou> XNU seemed very secure until people started actually poking it :P
<azonenberg_work> lool
<rqou> i've never looked at the BSD kernels
<cr1901_modern> azonenberg_work: NetBSD is the only kernel I've really looked at. MUCH easier to understand than Linux once you get used to the directory structure. Free is similar
<cr1901_modern> they both use bus_space_map/read/write fcns to abstract away device driver I/O, so in theory the same driver can be used on different platforms w/ different bus architectures w/o changes
<rqou> doesn't linux also have that?
<cr1901_modern> Not that I'm aware
<rqou> maybe only the PCI bus is abstracted
<rqou> no wait
<rqou> at least some of the driver IO has to be abstracted
<rqou> because the USB HCI drivers are shared across bus architectures
<cr1901_modern> Well, even if that's true, my original point still stands :P. I've had a much easier time looking at BSD kernel code than Linux
<rqou> quite possible
<rqou> you hang out in #j-core, have you seen the giant mess that is arch/sh in linux? :P
<cr1901_modern> No. And don't really want to, tbh. I'm waiting for the J4 patent to expire, then I'll attempt a Net port
<cr1901_modern> depending on how I feel and how confident I am
<rqou> no nommu support on netbsd?
<cr1901_modern> NetBSD doesn't support any system without an MMU
<cr1901_modern> it's a "open project", but nommu skeeves me in the first place so I'm not the one to add it
<rqou> hmm i wonder how possible it is to build a linux 4.8 for sh4/dreamcast
<rqou> i actually obtained a dreamcast and booted a ~2003 era linux build on it, but I have no idea how to put together a new one
<rvense> wasn't it drapped? sh4
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<cr1901_modern> rqou: Yea I think you're right. Linux's device abstraction facilities are all over the place, like DRM and drivers/tty/serial/serial_core.c
<rqou> ugh tty
<rqou> iirc the tty subsystem is awful
<rqou> it was also one of the last components that was holding up deleting the Big Kernel Lock
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<azonenberg_work> rqou: ?
<azonenberg_work> Big Kernel Lock?
<cr1901_modern> Some old legacy thing that prevented the kernel from being multithreaded IIRC
<rqou> linux used to have a giant global lock to help implement SMP: https://kernelnewbies.org/BigKernelLock
<rqou> during the last push to get rid of it the tty subsystem was migrated to a Big TTY Mutex that was global only within the tty subsystem
<azonenberg_work> lol
<azonenberg_work> So the entire tty subsystem still has a global lock"
<carl0s> Hi all :), cyrozap, just downloaded all the TRM and Registers TRM from Cypress to try to understand all the memorymaps, i just want to be sure to not work on something that you are already working, what family of PSoC are you working on (libopencm3 support)? i would like to start on 4200 fam.
<rqou> i have no idea
<cr1901_modern> I like atomics for lock-free data structures, but sadly I'm not exactly wonderful at using them. Or implementing them.
<cr1901_modern> Or even understanding them.
<rqou> last time I looked at the tty/pty/termios/job control stuff, I was amazed that it worked
<qu1j0t3> :)
* qu1j0t3 should get a T-shirt, HOW DID THIS EVER WORK AT ALL
<cr1901_modern> This video is increasingly relevant to my life: https://twitter.com/cr1901/status/791063287551098881
<cr1901_modern> well video within tweet
<cr1901_modern> It is a perfect metaphor for how errors always cascade in ways that waste more of your time and energy, as opposed to letting you just get work done.
<qu1j0t3> I remember that episode. It's awesome.
<cr1901_modern> It's one of my favorites for that scene alone
<qu1j0t3> yep
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<balrog> ohai qu1j0t3
<qu1j0t3> balrog: o/
<whitequark> anyone pinged me here?
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<cr1901_modern> rqou was asking about your domain
<rqou> i was?
<rqou> no, I was joking about my domain
<cr1901_modern> Oh. Well if fucking search worked on my IRC client, I could check
<cr1901_modern> lmao
<rqou> just use grep :P
<azonenberg_work> whitequark: so what's the status on the buildbot? What has to be done on my end to set things up? What if anything do you need to do to set it up? When do you expect to have time to do that?
<whitequark> azonenberg_work: all should be set on your end. I think I'll be able to set it maybe later today
<whitequark> ah, can you make a repo for the buildbot config?
<azonenberg_work> i dont have my github password saved on the work box
<azonenberg_work> Will do it when i get home
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