clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<maikmerten> hmmm... were there improvements in BRAM-inference in yosys lately? I remember a 512x8 boot-ROM being using up two iCE40 EBRAMs (basically letting half the capacity go to waste), but it now only uses up one EBRAM block. Nice.
<maikmerten> *being synthesized
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<maikmerten> I've got a state machine that only advances if a "busy"-signal is not asserted. I keep the previous state (to return to if busy is asserted) and the next state (to transition to if busy is not asserted) in registers. I basically use a multiplexer to either act on prevstate or nextstate. I can do this via always @(*) or via assign
<maikmerten> is one way preferrable over the other
<sorear> they're equivalent
<sorear> although it's confusing that you decided to register next_state instead of having next_state be a wire and state a register
<maikmerten> thanks
<maikmerten> yeah, I guess the naming is somewhat unusual
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