ChanServ changed the topic of #picolisp to: PicoLisp language | Channel Log: https://irclog.whitequark.org/picolisp/ | Check also http://www.picolisp.com for more information
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<olaf_> hi, I'm just checking if my settings are allright to read+write here
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<olaf_h> hi, I'm just checking if my settings are allright to read+write here
<beneroth> seems so
<beneroth> Regenaxer, I didn't get my own mail ^^'
<beneroth> s/get/receive
<Regenaxer> olaf_h, we see you :)
<Regenaxer> beneroth, strange. And my last one seems not in the archive
<Regenaxer> olaf_h, we saw you both as <olaf_> and as <olaf_h>
<Regenaxer> you can also chech the irc log at https://irclog.whitequark.org/picolisp
<Regenaxer> beneroth, sigh, as we discussed a few days ago. I'm fed up with all those mail problems
<Regenaxer> Perhaps in the future we should switch to a Matrix room?
<beneroth> maybe.
<beneroth> the mail problems should be solvable in principle. not sure if worth the effort.
<Regenaxer> yeah, by setting up a mail server
<Regenaxer> I don't want to bother with that ;)
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<olaf_h> thank you for your replies, Regenaxer and beneroth. And irclog seems to record my msgs, too.
<olaf_h> Fine, then we'll see us next time here.
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<beneroth> yo Seteeri
<Seteeri> good evening!
<Seteeri> working on timers and interrupt handling :)
<Regenaxer> Which stack is used when an interrupt occurs?
<Regenaxer> Perhaps it needs some care
<Regenaxer> Cause if coroutines are active, the stack is segmented
<Regenaxer> and if an interrupt uses too much stack it coul n overwrite the next coroutine space
<Regenaxer> In normal user mode this is not a problem cause the superuser stack is used in an interrupt
<Seteeri> i still have to do the mem allocation for coroutines. pil21 allocates the co stacks arbitrarily whereas pilos created a segment for it under the main stack
<Seteeri> if my understanding is correct
<Regenaxer> It is the same in pil21 and pilos
<Seteeri> ah ok
<Regenaxer> just decrements the stack pointer by the frame size for the next coroutine
<Regenaxer> I think nothing special needs to be implemented in your case
<Seteeri> currently i have the asm exception handler branch/link to a pil21 fn which will call a fn defined in a global symbol (so it can be set from within the interpreter)
<Regenaxer> for coroubnines, I mean
<Seteeri> im trying to figure how to embed assembly in pilsrc since I need access to the system registers
<Regenaxer> An interrupt handler shoul never call Lisp code
<Regenaxer> same in normal picolisp for signals
<Regenaxer> this would be fatal
<Regenaxer> Pil may just be in a garbage collection
<Regenaxer> or some other atomic operation
<Seteeri> the handler saves the registers and stacks which should be ok?
<Seteeri> er stack ptr and other system registers
<Regenaxer> yes, but *Lisp* code cannot run then
<Regenaxer> the heap may be all marked
<Seteeri> mmm
<Seteeri> tricky
<Regenaxer> Pil just remember the Sig in a global
<Regenaxer> and sigChk checks in safe situations
<Seteeri> so if GC in progress and interrupt occurs, it should wait for the GC?
<Regenaxer> It must wait for a stable, safe situation
<Seteeri> i need to check again pilos
<Regenaxer> chech sigChk()
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<Regenaxer> Just how and what sigChk() does
<Regenaxer> signal() in Unix is exactly an interrupt
<Seteeri> for example, irqKey in beg.l calls keyIrqB
<Regenaxer> yes, but this is low-level, right
<Regenaxer> should not call *Lisp* code
<Seteeri> yes
<Seteeri> ah
<Regenaxer> any other code is fine
<Seteeri> bc keyIrqB is not calling any lisp code
<Regenaxer> yeah
<Regenaxer> Lisp code cannot run as all runtime envs may be in an undefined state
<Regenaxer> like local variable bindings
<Regenaxer> Same reason why Pil cannot implement threads
<Regenaxer> (i.e. 2 processes operating on the same heap)
<Seteeri> ic
<Seteeri> so maybe i can have the interrupt handler set data in a non-GC portion of memory and have a lisp fn check it...
<Regenaxer> yes, good
<Regenaxer> Or do it like sigChk()
<Regenaxer> checking a global flag
<Seteeri> i was trying to avoid polling
<Regenaxer> Me too, but there is no other way I believe
<Regenaxer> the check is very fast
<Seteeri> ya
<Regenaxer> check a global for non-zero
<Regenaxer> Could also be a register
<Seteeri> or run the chech in a timer
<Seteeri> *check
<Seteeri> nm that runs into the same issue
<Regenaxer> yes
<Regenaxer> timer is also an interrupt usually
<Regenaxer> Pilos sleeps
<Regenaxer> like waitFd in normal pil
<Regenaxer> So no polling
<Regenaxer> Sleep until a timer expires
<Regenaxer> or data are available
<Regenaxer> in case of Pilos only a key press iirc
<Seteeri> if i set a global symbol, the value could still get gc'd if the sweep runs after the interrupt and it is not marked
<Regenaxer> no
<Regenaxer> not a symbol
<Regenaxer> a byte in memory
<Regenaxer> Just look what pil21 does
<Regenaxer> or pil64
<Regenaxer> same in both cases
<Seteeri> ok
<Regenaxer> (var Sig i32 NIL)
<Regenaxer> (inline sigChk (Exe) in src/dec.l
<Seteeri> i see what you're saying
<Seteeri> so i really just need to hook up the asm intr to the intr handlers
<Regenaxer> I think so. Analog
<Seteeri> I have a better idea of what to do now. I'll continue tmrw
<Regenaxer> Great :) Good night!
<Seteeri> Thanks for the help! Night :)
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